TL5812, TL5812l

VACUUM FLUORESCENT DISPLAY DRIVERS

SLDS011B − OCTOBER 1985 − REVISED MAY 1993

1

POST OFFICE BOX 655303

POST OFFICE BOX 1443

description

integrated circuits designed to drive a dot matrix

or segmented vacuum fluorescent display (VFD).

Each device features a serial data output to

cascade additional devices for large display

arrays.

A 20-bit data word is serially loaded into the shift

register on the low-to-high transition of CLOCK.

Parallel data is transferred to the output buffers

through a 20-bit D-type latch while LATCH

ENABLE is high and is latched when LATCH

ENABLE is low. When BLANKING is high, all

outputs are low.

The outputs are totem-pole structures formed by

npn emitter-follower and double-diffused MOS

(DMOS) transistors with output voltage ratings of

70 V and a source-current capability of 40 mA. All

inputs are CMOS compatible.

The TL5812 is characterized for operation from

0

°C to 70°C. The TL5812I is characterized for

operation from − 40

°C to 85°C.

† BIDFET − Bipolar, double-diffused, N-channel and P-channel MOS transistors on same chip. This is a patented process.

Copyright

 1993, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

32 1

13 14

5

6

7

8

9

10

11

Q2

Q3

Q4

Q5

Q6

Q7

Q8

Q18

Q17

Q16

Q15

Q14

Q13

Q12

4

15 16 17 18

28 27 26

25

24

23

22

21

20

19

12

FN PACKAGE

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1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

SERIAL DATA OUT

Q20

Q19

Q18

Q17

Q16

Q15

Q14

Q13

Q12

Q11

BLANKING

GND

DATA IN

Q1

Q2

Q3

Q4

Q5

Q6

Q7

Q8

Q9

Q10

LATCH ENABLE (STROBE)

CLOCK

N PACKAGE

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