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LM10 Datasheet(PDF) 3 Page - Texas Instruments |
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LM10 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 34 page  LM10 www.ti.com SNOSBH4D – MAY 1998 – REVISED MARCH 2013 Operating Ratings Package Thermal Resistance θJA NEV Package 150°C/W P Package 87°C/W NPA Package 90°C/W θJC NEV Package 45°C/W Electrical Characteristics TJ=25°C, TMIN≤TJ≤TMAX (Boldface type refers to limits over temperature range) (1) Parameter Conditions LM10/LM10B LM10C Units Min Typ Max Min Typ Max Input offset voltage 0.3 2.0 0.5 4.0 mV 3.0 5.0 mV Input offset current(2) 0.25 0.7 0.4 2.0 nA 1.5 3.0 nA Input bias current 10 20 12 30 nA 30 40 nA Input resistance 250 500 150 400 k Ω 150 115 k Ω Large signal voltage VS=±20V, IOUT=0 120 400 80 400 V/mV gain VOUT=±19.95V 80 50 V/mV VS=±20V, VOUT=±19.4V 50 130 25 130 V/mV IOUT=±20 mA (±15 mA) 20 15 V/mV VS=±0.6V (0.65V), IOUT=±2 mA 1.5 3.0 1.0 3.0 V/mV VOUT=±0.4V (±0.3V), VCM=−0.4V 0.5 0.75 V/mV Shunt gain(3) 1.2V (1.3V) ≤VOUT≤40V, 14 33 10 33 V/mV RL=1.1 kΩ 0.1 mA ≤IOUT≤5 mA 6 6 V/mV 1.5V ≤V+≤40V, RL=250Ω 8 25 6 25 V/mV 0.1 mA ≤IOUT≤20 mA 4 4 V/mV Common-mode −20V≤VCM≤19.15V (19V) 93 102 90 102 dB rejection VS=±20V 87 87 dB Supply-voltage −0.2V≥V−≥−39V 90 96 87 96 dB rejection V+=1.0V (1.1V) 84 84 dB 1.0V (1.1V) ≤V+≤39.8V 96 106 93 106 dB V−= −0.2V 90 90 dB Offset voltage drift 2.0 5.0 μV/°C Offset current drift 2.0 5.0 pA/°C Bias current drift TC<100°C 60 90 pA/°C Line regulation 1.2V (1.3V) ≤VS≤40V 0.001 0.003 0.001 0.008 %/V 0 ≤IREF≤1.0 mA, VREF=200 mV 0.006 0.01 %/V (1) These specifications apply for V− ≤VCM≤V +−0.85V (1.0V), 1.2V (1.3V) <V S≤VMAX, VREF=0.2V and 0≤IREF≤1.0 mA, unless otherwise specified: VMAX=40V for the standard part and 6.5V for the low voltage part. Normal typeface indicates 25°C limits. Boldface type indicates limits and altered test conditions for full-temperature-range operation; this is −55°C to 125°C for the LM10, −25°C to 85°C for the LM10B(L) and 0°C to 70°C for the LM10C(L). The specifications do not include the effects of thermal gradients ( τ1≃20 ms), die heating ( τ2≃0.2s) or package heating. Gradient effects are small and tend to offset the electrical error (see curves). (2) For TJ>90°C, IOS may exceed 1.5 nA for VCM=V −. With T J=125°C and V −≤V CM≤V −+0.1V, I OS≤5 nA. (3) This defines operation in floating applications such as the bootstrapped regulator or two-wire transmitter. Output is connected to the V+ terminal of the IC and input common mode is referred to V− (see Typical Applications). Effect of larger output-voltage swings with higher load resistance can be accounted for by adding the positive-supply rejection error. Copyright © 1998–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM10 |
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