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LM20134 Datasheet(PDF) 18 Page - Texas Instruments

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Part # LM20134
Description  LM20134/LM20134Q 4A, PowerWise Synchronous Buck Regulator with Input
PDF  31 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LM20134 Datasheet(HTML) 18 Page - Texas Instruments

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RC1 =
x
CC1
COUT
IOUT
VOUT
+
15 x D
VIN
-1
+
1-D
fSW x L
COMP
CC1
RC1
CC2
LM20134
(optional)
AM
fSW/2
0 dB
FREQUENCY (Hz)
Error Amp Zero, fZ(EA)
Complex Double Pole, fP(MOD)
Optional Error Amp
Pole, fP2(EA)
0 dB
0 dB
AEA + AM
AEA
Error Amp Pole, fP1(EA)
Complex Double Pole, fP(MOD)
Output Filter Zero, fZ(FIL)
Output Filter Pole, fP(FIL)
fC
Error Amp Pole, fP(EA)
LM20134, LM20134Q
SNVS527G – OCTOBER 2007 – REVISED MARCH 2013
www.ti.com
Figure 30. LM20134 Loop Compensation
The power stage transfer function is dictated by the modulator, output LC filter, and load; while the feedback
transfer function is set by the feedback resistor ratio, error amp gain, and external compensation network.
To achieve a -20dB/decade slope, the error amplifier zero, located at fZ(EA), should positioned to cancel the
output filter pole (fP(FIL)). An additional error amp pole, located at fP2(EA), can be added to cancel the output filter
zero at (fZ(FIL)). Cancellation of the output filter zero is recommended if larger value, non-ceramic output
capacitors are used.
Compensation of the LM20134 is achieved by adding an RC network as shown in Figure 31 below.
Figure 31. Compensation Network for LM20134
A good starting value for CC1 for most applications is 4.7 nF. Once the value of CC1 is chosen the value of RC
should be calculated using the equation below to cancel the output filter pole (fP(FIL)) as shown in Figure 30.
(8)
A higher crossover frequency can be obtained, usually at the expense of phase margin, by lowering the value of
CC1 and recalculating the value of RC1. Likewise, increaseing CC1 and recalculating RC1 will provide additional
phase margin at a lower crossover frequency. As with any attempt to compensate the LM20134 the stability of
the system should be verified for desired transient droop and settling time.
If the output filter zero, (fZ(FIL)) approaches the crossover frequency (FC), an additional capacitor (CC2) should be
placed at the COMP pin to ground. This capacitor adds a pole to cancel the output filter zero assuring the
crossover frequency will occur before the double pole at fSW/2 degrades the phase margin. The output filter zero
is set by the output capacitor value and ESR as shown in the equation below.
18
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Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LM20134 LM20134Q



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