BST

SW

VCC

IS

GND

LM5575

D1

L1

D2

BST

SW

VCC

IS

GND

LM5575

D2

D1

L1

LM5575

SNVS471G – JANUARY 2007 – REVISED APRIL 2013

www.ti.com

If a network analyzer is available, the modulator gain can be measured and the error amplifier gain can be

configured for the desired loop transfer function. If a network analyzer is not available, the error amplifier

compensation components can be designed with the guidelines given. Step load transient tests can be

performed to verify acceptable performance. The step load goal is minimum overshoot with a damped response.

C6 can be added to the compensation network to decrease noise susceptibility of the error amplifier. The value

of C6 must be sufficiently small since the addition of this capacitor adds a pole in the error amplifier transfer

function. This pole must be well beyond the loop crossover frequency. A good approximation of the location of

BIAS POWER DISSIPATION REDUCTION

Buck regulators operating with high input voltage can dissipate an appreciable amount of power for the bias of

techniques that can significantly reduce this bias regulator power dissipation. Figure 20 and Figure 21 depict two

methods to bias the IC from the output voltage. In each case the internal Vcc regulator is used to initially bias the

VCC pin. After the output voltage is established, the VCC pin potential is raised above the nominal 7V regulation

Figure 20. VCC Bias from VOUT for 8V < VOUT < 14V

Figure 21. VCC Bias with Additional Winding on the Output Inductor

18

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