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AS8515 Datasheet(PDF) 16 Page - ams AG |
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AS8515 Datasheet(HTML) 16 Page - ams AG |
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16 / 65 page  www.ams.com Revision 0.7 16 - 65 AS8515 Datasheet - AS8515 To p Die Overview 7.11 Initialization When the power supply is switched on, when VSUP > VSUVR_OFF, RESET_VSUP_N becomes high. This starts the regulator LDO with 3.3V and Vuvr_off option of 2.75V. When VCC > Vuvr_off (2.75V), active-low PORN_2_OTP is generated. The rising edge of PORN_2_OTP loads contents of fuse onto the factory setting latch after load access time TLoad. LOAD_OTP_IN_PREREG signal loads contents of factory setting latch onto a register. This register provides the actual settings of LDO, Vuvr_off and Reset Timeout period TRes. This is done as the factory setting block is powered by the VCC. If VCC > Vuvr_off (phase 2), Reset timeout is restarted. RESET signal is de-asserted after Reset Timeout period TRes (phase 2) and then device enters into normal mode. The circuit also needs to initialize correctly for very slow ramp rates on VSUP (of the order of 0.5V/min). Figure 7. Initialization Sequence Table 16. VSUP>Vsuvr_on and VCC<Vuvr_on Block Output Signal TRANSCEIVER=Enabled (disabled only during initial VSUP ramp-up) LIN=high-z, Rx=follows VCC… LDO=Enabled (disabled only during initial ramp-up) VCC=low… RESET BLOCK=Enabled RESET=high-z… RESISTIVE DIVIDER=Enabled VSENSE=high…, VSENSE_DIV=enabled LDO Off LDO On VCC Por Threshold = 2.75V LDO setting = 3.3V Reset Timeout = 4msec LDO On VCC Por Threshold = from OTP Block LDO setting = from OTP Block Reset Timeout = from OTP Block VCC VSUP Device Settings RESET_VCC_N RESET_VSUP_N PORN_2_OT P LOAD_OTP_IN_PREREG RESET VCC_POR_Threshold VSUP_POR_Threshold 6 Cycles of RC-Oscillator PHASE 1 PHASE 2 If Phase 1 POR threshold == Phase 2 POR threshold Tres = Reset Timeout from OTP Block If Phase 1 POR threshold != Phase 2 POR threshold Tres = Reset Timeout from OTP Block LDO settings to 5 V LDO settings to 3.3 V |
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