LP2996M datasheet(11/26 Pages) TI

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AIRFLOW (Linear Feet Per Minute)

LP2996-N

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SNOSA40J – NOVEMBER 2002 – REVISED MARCH 2013

Figure 23.

θJA vs Airflow Speed (JEDEC Board with 4 Vias)

Optimizing the

θJA and placing the LP2996-N in a section of a board exposed to lower ambient temperature

allows the part to operate with higher power dissipation. The internal power dissipation can be calculated by

summing the three main sources of loss: output current at VTT, either sinking or sourcing, and quiescent current

at AVIN and VDDQ. During the active state (when shutdown is not held low) the total internal power dissipation

can be calculated from the following equations:

PD = PAVIN + PVDDQ + PVTT

where

(3)

PAVIN = IAVIN * VAVIN

(4)

PVDDQ = VVDDQ * IVDDQ = VVDDQ2 x RVDDQ

(5)

To calculate the maximum power dissipation at VTT both conditions at VTT need to be examined, sinking and

sourcing current. Although only one equation will add into the total, VTT cannot source and sink current

simultaneously.

PVTT = VVTT x ILOAD (Sinking) or

(6)

PVTT = ( VPVIN - VVTT) x ILOAD (Sourcing

(7)

The power dissipation of the LP2996-N can also be calculated during the shutdown state. During this condition

the output VTT will tri-state, therefore that term in the power equation will disappear as it cannot sink or source

any current (leakage is negligible). The only losses during shutdown will be the reduced quiescent current at

AVIN and the constant impedance that is seen at the VDDQ pin.

PD = PAVIN + PVDDQ

(8)

PAVIN = IAVIN x VAVIN

(9)

PVDDQ = VVDDQ * IVDDQ = VVDDQ2 x RVDDQ

(10)

Typical Application Circuits

Several different application circuits have been shown in Figure 24 through Figure 33 to illustrate some of the

options that are possible in configuring the LP2996-N. Graphs of the individual circuit performance can be found

in the Typical Performance Characteristics section in the beginning of the datasheet. These curves illustrate how

the maximum output current is affected by changes in AVIN and PVIN.

SSTL-2 APPLICATIONS

For the majority of applications that implement the SSTL-2 termination scheme it is recommended to connect all

the input rails to the 2.5V rail. This provides an optimal trade-off between power dissipation and component count

and selection. An example of this circuit can be seen in Figure 24.

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