AT89C1051

4-6

Special Function Registers

A map of the on-chip memory area called the Special Func-

tion Register (SFR) space is shown in the table below.

Note that not all of the addresses are occupied, and unoc-

cupied addresses may not be implemented on the chip.

Read accesses to these addresses will in general return

random data, and write accesses will have an indetermi-

nate effect.

User software should not write 1s to these unlisted loca-

tions, since they may be used in future products to invoke

new features. In that case, the reset or inactive values of

the new bits will always be 0.

Restrictions on Certain Instructions

The AT89C1051 is an economical and cost-effective mem-

ber of Atmel’s growing family of microcontrollers. It con-

tains 1K byte of flash program memory. It is fully compati-

ble with the MCS-51 architecture, and can be programmed

using the MCS-51 instruction set. However, there are a

few considerations one must keep in mind when utilizing

certain instructions to program this device.

All the instructions related to jumping or branching should

be restricted such that the destination address falls within

the physical program memory space of the device, which is

1K for the AT89C1051. This should be the responsibility of

the software programmer. For example, LJMP 3FEH

would be a valid instruction for the AT89C1051 (with 1K of

memory), whereas LJMP 410H would not.

Table 1. AT89C1051 SFR Map and Reset Values

0F8H

0FFH

0F0H

B

00000000

0F7H

0E8H

0EFH

0E0H

ACC

00000000

0E7H

0D8H

0DFH

0D0H

PSW

00000000

0D7H

0C8H

0CFH

0C0H

0C7H

0B8H

IP

XXX00000

0BFH

0B0H

P3

11111111

0B7H

0A8H

IE

0XX00000

0AFH

0A0H

0A7H

98H

9FH

90H

P1

11111111

97H

88H

TCON

00000000

TMOD

00000000

TL0

00000000

TH0

00000000

8FH

80H

SP

00000111

DPL

00000000

DPH

00000000

PCON

0XXX0000

87H