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T2801 Datasheet(PDF) 20 Page - ATMEL Corporation |
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T2801 Datasheet(HTML) 20 Page - ATMEL Corporation |
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20 / 27 page ![]() T2801 Rev. A9, 11-Dec-01 Preliminary Information 20 (27) 3-Wire Bus Protocol Timing Diagram DATA CLOCK ENABLE TT TEC TS TC TH TL TPER 16525 Figure 4. Description Symbol Min. Value Unit Clock period TPER 125 ns Set time data to clock TS 60 ns Hold time data to clock TH 60 ns Clock pulse width TC 60 ns Set time enable to clock TL 200 ns Hold time enable to data TEC 0 ns Time between two protocols TT 250 ns TX DATA Timing RefCLK TX_DATA TS TH Set-up time TX DATA TS 10 ns Hold time TX DATA TH 10 ns Figure 5. TX DATA timing TS and TH must be considered for both (falling and rising) edges of RefCLK when using REF_CLK = 10.368 MHz. Absolute Maximum Ratings All voltages refer to GND Parameter Symbol Min. Max. Unit Supply voltage regulator Pin 10 VS_REG 3.2 4.7 V Supply voltage Pins 7, 12, 14, 33 and 42 VS 3.0 4.7 V Logic input voltage Pins 1, 2, 3, 38, 39, 44, 45, 46, 47 and 48 VIN – 0.3 VS V Junction temperature Tjmax 150 _C Storage temperature Tstg –40 150 _C Thermal Resistance Parameter Symbol Value Unit Junction ambient RthJA t.b.d. K/W |
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