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LTC3414MPFE Datasheet(PDF) 6 Page - Linear Technology |
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LTC3414MPFE Datasheet(HTML) 6 Page - Linear Technology |
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6 / 16 page ![]() LTC3414 6 3414fb Main Control Loop The LTC3414 is a monolithic, constant-frequency, cur- rent-mode step-down DC/DC converter. During normal operation, the internal top power switch (P-channel MOS- FET) is turned on at the beginning of each clock cycle. Current in the inductor increases until the current com- parator trips and turns off the top power MOSFET. The peak inductor current at which the current comparator shuts off the top power switch is controlled by the voltage on the ITH pin. The error amplifier adjusts the voltage on the ITH pin by comparing the feedback signal from a resistor divider on the VFB pin with an internal 0.8V reference. When the load current increases, it causes a reduction in the feedback voltage relative to the reference. The error amplifier raises the ITH voltage until the average inductor current matches the new load current. When the top power MOSFET shuts off, the synchronous power switch (N-channel MOSFET) turns on until either the bottom current limit is reached or the beginning of the next clock cycle. The bottom current limit is set at –5A for forced continuous mode and 0A for Burst Mode operation. The operating frequency is externally set by an external resistor connected between the RT pin and ground. The practical switching frequency can range from 300kHz to 4MHz. Overvoltage and undervoltage comparators will pull the PGOOD output low if the output voltage comes out of regulation by ±7.5%. In an overvoltage condition, the top power MOSFET is turned off and the bottom power MOS- FET is switched on until either the overvoltage condition clears or the bottom MOSFET’s current limit is reached. Forced Continuous Mode Connecting the SYNC/MODE pin to SVIN will disable Burst Mode operation and force continuous current operation. At light loads, forced continuous mode operation is less efficient than Burst Mode operation, but may be desirable in some applications where it is necessary to keep switch- OPERATIO BLOCK DIAGRA – + – + – + – + – + 16 19 17 4 2 5 18 7 14 SLOPE COMPENSATION RECOVERY SLOPE COMPENSATION VOLTAGE REFERENCE OSCILLATOR LOGIC 3 0.74V 0.86V RUN 13 12 9 8 SVIN SGND 21 EXPOSED PAD ITH PVIN PVIN PMOS CURRENT COMPARATOR BCLAMP VFB RUN/SS PGOOD RT SYNC/MODE PGND PGND PGND PGND CURRENT REVERSAL COMPARTOR NMOS CURRENT COMPARATOR BURST COMPARATOR ERROR AMPLIFIER SW SW SW SW 10 11 20 1 3414 BD SYNC/MODE + V 0.8V |
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