N-Channel Enhancement Mode

Dual DMOS FET

SD411

FEATURES

Dual JFETs with Addition of Substrate Bias Pin

APPLICATIONS

DESCRIPTION

The SD411 is constructed utilizing Calogic’s high speed

lateral

DMOS

techniques

featuring

tight

matching

characteristics between each FET. This device is an excellent

choice for instrumentation, communication, RF and Video

designs.

ORDERING INFOMATION

Part

Package

Temperature Range

SD411

TO-78 Hermetic Package

-55

XSD411

Sorted Chips in Carriers

-55

PIN CONFIGURATION

CORPORATION

S2

G1

D2

D1

G2

S1

C

TO-78

1

2

3

4 5

BOTTOM VIEW

1

2

3

4

5

6

7

7

6

SOURCE 1

DRAIN 1

GATE 1

CASE/BODY

SOURCE 2

DRAIN 2

GATE 2

CD2