CAT28HT64 datasheet(7/10 Pages) CATALYST

7 / 10 page

CAT28HT64

8-45

Advanced

Stock No. 21064-04 2/98

Page Write

The page write mode of the CAT28HT64 (essentially an

extended BYTE WRITE mode) allows from 1 to 32 bytes

of data to be programmed within a single E2PROM write

cycle. This effectively reduces the byte-write time by a

factor of 32.

Following an initial WRITE operation (WE pulsed low, for

tWP, and then high) the page write mode can begin by

issuing sequential WE pulses, which load the address

and data bytes into a 32 byte temporary buffer. The page

address where data is to be written, specified by bits A5

to A12, is latched on the last falling edge of WE. Each

byte within the page is defined by address bits A0 to A4

(which can be loaded in any order) during the first and

subsequent write cycles. Each successive byte load

cycle must begin within tBLC MAX of the rising edge of the

preceding WE pulse. There is no page write window

limitation as long as WE is pulsed low within tBLC MAX.

Upon completion of the page write sequence, WE must

stay high a minimum of tBLC MAX for the internal auto-

matic program cycle to commence. This programming

cycle consists of an erase cycle, which erases any data

that existed in each addressed cell, and a write cycle,

which writes new data back into the cell. A page write will

only write data to the locations that were addressed and

will not rewrite the entire page.

Figure 5. Byte Write Cycle [CE Controlled]

5094 FHD F07

Figure 6. Page Mode Write Cycle

ADDRESS

I/O

tWP

tBLC

BYTE 0

BYTE 1

BYTE 2

BYTE n

BYTE n+1

BYTE n+2

LAST BYTE

tWC

5096 FHD F10

ADDRESS

DATA OUT

tAS

DATA IN

DATA VALID

HIGH-Z

tAH

tWC

tOEH

tDH

tDS

tOES

tBLC

tCH

tCS

tCW

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