Electronic Components Datasheet Search
  English  ▼

X  

R32C111 Datasheet(PDF) 19 Page - Renesas Technology Corp

Part # R32C111
Description  RENESAS MCU
PDF  102 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R32C111 Datasheet(HTML) 19 Page - Renesas Technology Corp

Back Button R32C111 Datasheet HTML 15Page - Renesas Technology Corp R32C111 Datasheet HTML 16Page - Renesas Technology Corp R32C111 Datasheet HTML 17Page - Renesas Technology Corp R32C111 Datasheet HTML 18Page - Renesas Technology Corp R32C111 Datasheet HTML 19Page - Renesas Technology Corp R32C111 Datasheet HTML 20Page - Renesas Technology Corp R32C111 Datasheet HTML 21Page - Renesas Technology Corp R32C111 Datasheet HTML 22Page - Renesas Technology Corp R32C111 Datasheet HTML 23Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 19 / 102 page
background image
R01DS0062EJ0130 Rev.1.30
Page 19 of 93
Mar 3, 2014
R32C/111 Group
1. Overview
Table 1.12
Pin Definitions and Functions for the 100-pin Package (2/4)
Function
Symbol
I/O
Power
Supply
Description
Bus control pins
A0/D0 to A7/D7
I/O
VCC2
Output of address bits (A0 to A7) and input/output
of data (D0 to D7) by time-division while accessing
an external memory space with multiplexed bus
A8/D8 to
A15/D15
I/O
VCC2
Output of address bits (A8 to A15) and input/
output of data (D8 to D15) by time-division while
accessing an external memory space with 16-bit
multiplexed bus
BC0/D0
I/O
VCC2
Output of byte control (
BC0) and input/output of
data (D0) by time-division while accessing an
external memory space with multiplexed bus
CS0 to CS3
O
VCC2
Chip select output
WR0/WR1/WR/
BC0/BC1/RD
O
VCC2
Output of write, byte control, and read signals.
Either
WRx or WR and BCx can be selected by a
program.
Data is read when
RD is low.
• When
WR0, WR1, and RD are selected,
data is written to the following address:
an even address, when
WR0 is low
an odd address, when
WR1 is low
on 16-bit external data bus
• When
WR, BC0, BC1, and RD are selected,
data is written, when
WR is low
and
the following address is accessed:
an even address, when
BC0 is low
an odd address, when
BC1 is low
on 16-bit external data bus
ALE
O
VCC2
Latch enable signal in multiplexed bus format
HOLD
I
VCC2
The MCU is in a hold state while this pin is held
low
HLDA
O
VCC2
This pin is driven low while the MCU is held in a
hold state
RDY
I
VCC2
Bus cycle is extended by the CPU if this pin is low
on the falling edge of BCLK



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com