OPA4830IPW datasheet(35/45 Pages) NSC

35 / 45 page

DC ACCURACY AND OFFSET CONTROL

THERMAL ANALYSIS

(NG=noninvertingsignalgainatdc)

(NG

)

= (2

8mV)

(375

1.1 A)

= 16.41mV

OS(MAX)

(10)

P =5V

19mA+4

5 /(4

(150

||750 ))=295mW

MaximumT =+85 C+(0.295W

95 C/W)=+113 C

OPA4830

www.ti.com.................................................................................................................................................... SBOS350A – DECEMBER 2006 – REVISED MAY 2008

The

balanced

input

stage

wideband

Maximum desired junction temperature sets the

voltage-feedback op amp allows good output dc

maximum allowed internal power dissipation, as

accuracy in a wide variety of applications. The

described below. In no case should the maximum

power-supply current trim for the OPA4830 gives

junction temperature be allowed to exceed +150

°C.

even

tighter

control

than

comparable

products.

Operating junction temperature (TJ) is given by TA +

Although the high-speed input stage does require

PD × θJA. The total internal power dissipation (PD) is

relatively high input bias current (typically 5

µA out of

the sum of quiescent power (PDQ) and additional

each input terminal), the close matching between

power dissipated in the output stage (PDL) to deliver

them may be used to reduce the output dc error

load power. Quiescent power is simply the specified

caused by this current. This reduction is achieved by

no-load supply current times the total supply voltage

matching the dc source resistances appearing at the

across the part. PDL depends on the required output

two inputs. Evaluating the configuration of Figure 74

signal and load; though, for resistive loads connected

(which has matched dc input resistances), using

to mid-supply (VS/2), PDL is at a maximum when the

worst-case +25

°C input offset voltage and current

output is fixed at a voltage equal to VS/4 or 3VS/4.

specifications,

gives

worst-case

output

offset

Under this condition, PDL = VS

2/(16

× R

L), where RL

voltage equal to Equation 10:

includes feedback network loading.

Note that it is the power in the output stage, and not

into

the

load,

that

determines

internal

power

dissipation.

As a worst-case example, compute the maximum TJ

using an OPA4830 (TSSOP-14 package) in the circuit

of Figure 72 operating at the maximum specified

A fine-scale output offset null, or dc operating point

ambient temperature of +85

°C and driving a 150Ω

adjustment, is often required. Numerous techniques

load at mid-supply.

are available for introducing dc offset control into an

op amp circuit. Most of these techniques are based

on adding a dc current through the feedback resistor.

selecting

offset

trim

method,

one

key

consideration is the impact on the desired signal path

frequency response. If the signal path is intended to

Although this value is still well below the specified

be noninverting, the offset control is best applied as

maximum junction temperature, system reliability

an inverting summing signal to avoid interaction with

considerations may require lower ensured junction

the signal source. If the signal path is intended to be

temperatures.

The

highest

possible

internal

inverting,

applying

the

offset

control

the

dissipation occurs if the load requires current to be

noninverting input may be considered. Bring the dc

forced into the output at high output voltages or

offsetting current into the inverting input node through

sourced from the output at low output voltages. This

resistor values that are much larger than the signal

puts a high current through a large internal voltage

path resistors. This configuration ensures that the

drop in the output transistors.

adjustment circuit has minimal effect on the loop gain

and therefore the frequency response.

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