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ICS953002 Datasheet(PDF) 4 Page - Integrated Circuit Systems |
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ICS953002 Datasheet(HTML) 4 Page - Integrated Circuit Systems |
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4 / 35 page ![]() 4 Integrated Circuit Systems, Inc. ICS953002 0924—11/18/09 ICS953002 is a 56-pin clock chip for P4 type processors with PCI-Express. The ICS953002 is part of a whole new line of ICS clock generators and buffers called TCH™ (Timing Control Hub). This part incorporates ICS's newest clock technology which offers more robust features and functionality. Employing the use of a serially programmable I 2C interface, this device can adjust the output clocks by configuring the frequency setting, the output divider ratios, selecting the ideal spread percentage, the output skew, the output strength, and enabling/disabling each individual output clock. M/N control can configure output frequency with resolution up to 0.1MHz increment. General Description Block Diagram I REF RESET# PLL2 Frequency Dividers Programmable Spread PLL1 Programmable Frequency Dividers STOP Logic 48MHz 24_48MHz X1 X2 XTAL SDATA SCLK VTTPWRGD# PD# Turbo# FS (4:0) Sel24_48# MODE0 Control Logic REF (1:0) CPUCLKT (1:0) CPUCLKC (1:0) CPUCLKT2_ITP/PCIEXT0 CPUCLKC2_ITP/PCIEXC0 3V66 (2:0) PCICLK (5:0) PCI-EXT (5:1) PCI-EXC (5:1) |
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