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CS4220 Datasheet(PDF) 15 Page - Cirrus Logic

Part # CS4220
Description  24-Bit Stereo Audio Codec with 3V Interface
PDF  32 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4220 Datasheet(HTML) 15 Page - Cirrus Logic

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CS4220 CS4221
DS284PP3
15
5.2.4
SOFT RAMP STEP RATE (RMP)
Default = 00
00 - 1 step per 8 LRCK’s
01 - 1 step per 4 LRCK’s
10 - 1 step per 16 LRCK’s
11 - 1 step per 32 LRCK’s
Function:
The rate of change for the Soft Ramp function is adjustable through the RMP bits.
5.3
Left Channel Output Attenuator Level (address 03h)
5.4
Right Channel Output Attenuator Level (address 04h)
5.4.1
ATTENUATION LEVEL (ATT7-ATT0)
Default = 00h
Function:
The Output Attenuator Level registers allow for attenuation of the DAC outputs in 0.5 dB increments
from 0 to 113.5 dB. Level changes are implemented with an analog volume control until the residual
output noise is equal to the noise floor in the mute state. At this point, volume changes are performed
digitally. This technique is superior to purely digital volume control because the noise is attenuated
by the same amount as the signal, thus preserving dynamic range, see Figure 16. Volume changes
are performed as dictated by the SOFT bit in the DAC Control register. ATT0 represents 0.5 dB of
attenuation and settings greater than 227 (decimal value) will mute the selected DAC output.
765
4321
0
ATT7
ATT6
ATT5
ATT4
ATT3
ATT2
ATT1
ATT0
000
0000
0
Binary Code
Decimal Value
Volume Setting
00000000
0
0 dB
11100011
227
-113.5 dB
11100100
228
Muted
Table 1. Example Volume Settings



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