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W130 Datasheet(PDF) 1 Page - Cypress Semiconductor

Part # W130
Description  Spread Spectrum Desktop/Notebook System Clock
PDF  8 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

W130 Datasheet(HTML) 1 Page - Cypress Semiconductor

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PRELIMINARY
Spread Spectrum Desktop/Notebook System Clock
W130
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
October 27, 1999, rev. **
Features
• Maximized EMI suppression using Cypress’s Spread
Spectrum technology
• Six copies of CPU Clock
• Eight copies of PCI Clock (synchronous w/CPU clock)
• Two copies of 14.318-MHz IOAPIC Clock
• Two copies of 48-MHz USB Clock
• Three buffered copies of 14.318-MHz reference input
• Input is a 14.318-MHz XTAL or reference signal
• Selectable 100-MHz or 66-MHz CPU Clocks
• Power management control input pins
• Test mode and output three-state capability
Key Specifications
Supply Voltages: ....................................... VDDQ3 = 3.3V±5%
VDDQ2 = 2.5V±5%
CPU Clock Jitter: ........................................................ 200 ps
CPU0:5 Clock Skew: ...................................................175 ps
PCI_F, PCI1:7 Clock Skew: ......................................... 500 ps
CPU to PCI Clock Skew: .............. 1.5 to 4.0 ns (CPU Leads)
Logic inputs have 250-k
Ω pull-up resistors except SEL100/66#.
Table 1. Pin Selectable Frequency
SEL
100/66#
SEL1
SEL0
CPU
PCI
SPREAD#=0
0
0
0
HI-Z
HI-Z
Don’t Care
0
0
1
66.6
33.3
±0.9% Center
0
1
0
66.6
33.3
–1% Down
0
1
1
66.6
33.3
–0.5% Down
1
0
0
X1/2
X1/6
Don’t Care
1
0
1
100
33.3
±0.9% Center
1
1
0
100
33.3
–1% Down
1
1
1
100
33.3
–0.5% Down
Pin Configuration
Block Diagram
VDDQ3
REF0
VDDQ2
APIC0
CPU0
CPU1
CPU3
CPU5
PCI_F
XTAL
PLL Ref Freq
PLL 1
100/66#_SEL
X2
X1
REF1
VDDQ3
Stop
Clock
Control
Stop
Clock
Control
PCI1
PWR_DWN#
Power
Down
Control
PCI2
PCI3
PCI4
PCI5
48MHz
48MHz
PLL2
÷2/÷3
OSC
REF2
VDDQ2
PCI_STOP#
CPU_STOP#
PCI6
PCI7
VDDQ3
APIC1
SEL0
SEL1
VDDQ3
SPREAD#
CPU2
CPU4
Power
Down
Control
REF0
REF1
GND
X1
X2
GND
PCI_F
PCI1
VDDQ3
PCI2
PCI3
GND
PCI4
PCI5
VDDQ3
PCI6
PCI7
GND
VDDQ3
GND
VDDQ3
48MHz
48MHz
GND
VDDQ3
REF2
VDDQ2
APIC0
APIC1
VDDQ2
CPU0
CPU1
CPU2
CPU3
GND
VDDQ2
CPU4
CPU5
GND
VDDQ3
GND
PCI_STOP#
CPU_STOP#
PWRDWN#
SPREAD#
SEL0
SEL1
SEL100/66#
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
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