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DS1609 Datasheet(PDF) 6 Page - Dallas Semiconductor

Part # DS1609
Description  Dual Port RAM
PDF  7 Pages
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS1609 Datasheet(HTML) 6 Page - Dallas Semiconductor

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DS1609
020499 6/7
DUAL PORT RAM TIMING: READ CYCLE
AD0 – AD7
DURING READ CYCLE WE = VIH
ADDRESS VALID
DON’T CARE
DATA OUT VALID
tAS
tAH
tCOE
tOEA
tOEZ
tCEZ
CE
OE
NOTES:
1. During read cycle the address must be off the bus prior to tOEA minimum to avoid bus contention.
2. Read cycles are terminated by the first occurring rising edge of OE or CE.
DUAL PORT RAM TIMING: WRITE CYCLE
AD0 – AD7
DURING WRITE CYCLE OE = VIH
ADDRESS VALID
DON’T CARE
DATA IN VALID
tAS
tAH
tCWE
tDH
CE
WE
tDS
tWP
NOTE:
1. Write cycles are terminated by the first occurring edge of WE or CE.



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