DS21FF42 datasheet(21/145 Pages) DALLAS

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DALLAS SEMICONDUCTOR

DS21FF42/DS21FT42

101899

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Signal Name:

TSYSCLK

Signal Description:

Transmit System Clock

Signal Type:

Input

1.544 MHz or 2.048 MHz clock. Only used when the transmit side elastic store function is

enabled. Should be tied low in applications that do not use the transmit side elastic store.

Can be burst at rates up to 8.192 MHz. This pin is tied to the RSYSCLK signal in the

DS21FF42/DS21FT42.

Signal Name:

TLCLK

Signal Description:

Transmit Link Clock

Signal Type:

Output

4 KHz or 2 KHz (ZBTSI) demand clock for the TLINK input. See Section 19 for details.

This signal is not bonded out in the DS21FF42/DS21FT42.

Signal Name:

TLINK

Signal Description:

Transmit Link Data

Signal Type:

Input

If enabled via TCR1.2, this pin will be sampled on the falling edge of TCLK for data

insertion into either the FDL stream (ESF) or the Fs–bit position (D4) or the Z–bit position

(ZBTSI). See Section 19 for details. This signal is not bonded out in the

DS21FF42/DS21FT42.

Signal Name:

TSYNC

Signal Description:

Transmit Sync

Signal Type:

Input /Output

A pulse at this pin will establish either frame or multiframe boundaries for the transmit side.

Via TCR2.2, the DS21Q42 can be programmed to output either a frame or multiframe pulse

at this pin. If this pin is set to output pulses at frame boundaries, it can also be set via

TCR2.4 to output double–wide pulses at signaling frames. See Section 24 for details.

Signal Name:

TSSYNC

Signal Description:

Transmit System Sync

Signal Type:

Input

Only used when the transmit side elastic store is enabled. A pulse at this pin will establish

either frame or multiframe boundaries for the transmit side. Should be tied low in

applications that do not use the transmit side elastic store.

Signal Name:

TSIG

Signal Description:

Transmit Signaling Input

Signal Type:

Input

DS21FF42 Datasheet(PDF) 21 Page - Dallas Semiconductor

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