DS89C420 datasheet(21/59 Pages) DALLAS

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DS89C420

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On-Chip MOVX Data Memory

On-chip data memory is provided by the 1kB SRAM and occupies addresses 0000h through 03FFh. The

internal data memory is disabled after a power-on reset, and any MOVX instruction directs the data

memory access to the external data memory. To enable the internal data memory, software must

configure the data memory enable bits DME1 and DME0 (PMR.1-0). See “SFR Bit Descriptions” in the

Ultra-High-Speed Flash Microcontroller User’s Guide

for data memory configurations. Once enabled,

MOVX instructions with addresses inside the 1k range access the on-chip data memory, and addresses

exceeding the 1k range automatically access external data memory.

An internal data memory cycle spans only one system clock period to support fast internal execution.

Data Pointer Increment/Decrement and Options

The DS89C420 incorporates a hardware feature to assist applications that require data pointer

increment/decrement. Data pointer increment/decrement bits ID0 and ID1 (DPS.6 and DPS.7) define how

the INC DPTR instruction functions in relation to the active DPTR (selected by the SEL bit). Setting

ID0 = 1 and SEL = 0 enables the decrement operation for DPTR, and execution of the INC DPTR

instruction decrements the DPTR contents by 1. Similarly, setting ID1 = 1 and SEL = 1 enables the

decrement operation for DPTR1, and execution of the INC DPTR instruction decrements the DPTR1

contents by 1. With this feature, the user can configure the data pointers to operate in four ways for the

INC DPTR instruction:

ID1

ID0

SEL = 0

SEL = 1

Increment DPTR

Increment DPTR1

Decrement DPTR

Increment DPTR1

Increment DPTR

Decrement DPTR1

Decrement DPTR

Decrement DPTR1

The active data pointer is always selected by the SEL (DPS.0) bit. The DS89C420 offers a programmable

option that allows any instructions related to data pointer to toggle the SEL bit automatically. This option

is enabled by setting the toggle-select-enable bit (TSL-DPS.5) to a logic 1. Once enabled, the SEL bit is

automatically toggled after the execution of one of the following five DPTR-related instructions:

INC DPTR

MOV DPTR #data16

MOVC A, @A+DPTR

MOVX A, @DPTR

MOVX @DPTR, A

The DS89C420 also offers a programmable option that automatically increases (or decreases) the

contents of the selected data pointer by 1 after the execution of a DPTR-related instruction. The actual

function (increment or decrement) is dependent upon the setting of the ID1 and ID0 bits. This option is

enabled by setting the automatic increment/decrement enable (AID-DPS.4) to a logic 1 and is affected by

one of the following three instructions:

MOVC A, @A+DPTR

MOVX A, @DPTR

MOVX @DPTR, A

DS89C420 Datasheet(PDF) 21 Page - Dallas Semiconductor

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