LTC3618 datasheet(4/24 Pages) LINEAR

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LTC3618

3618fb

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

VMODE

(Note 8)

VMODE High Voltage

Pulse-Skipping Mode

1.0

VMODE Low Voltage

Forced Continuous Mode

0.4

PGOOD1

Power Good Voltage Window of

VDDQ

TRACK/SS1 = SVIN, Entering Window

VFB1 Ramping Up

VFB1 Ramping Down

–5

–2

TRACK/SS1 = SVIN, Leaving Window

VFB1 Ramping Up

VFB1 Ramping Down

–10.5

–8

10.5

PGOOD2

Power Good Voltage Window of VTT

Entering Window

VTT Ramping Up

VTT Ramping Down

2.5

–5

–2.5

Leaving Window

VFB2 Ramping Up

VFB2 Ramping Down

–10.5

–8

10.5

tPGOOD

Power Good Blanking Time

Entering/Leaving Window

105

140

μs

RPGOOD

Power Good Pull-Down On-Resistance I = 10mA

VRUN

VRUN Voltage

Input High

Input Low

0.4

Pull-Down Resistance

4MΩ

ELECTRICAL CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC3618 is tested under pulsed load conditions such that

TJ ≈ TA. The LTC3618E is guaranteed to meet performance speciﬁcations

over the 0°C to 85°C operating junction temperature range. Speciﬁcations

over the –40°C to 125°C operating junction temperature range are

assured by design, characterization and correlation with statistical process

controls. The LTC3618I is guaranteed to meet speciﬁcations over the

full –40°C to 125°C operating junction temperature range. Note that the

maximum ambient temperature consistent with these speciﬁcations is

determined by speciﬁc operating conditions in conjunction with board

layout, the rated package thermal resistance and other environmental

factors. The junction temperature (TJ, in °C) is calculated from the ambient

temperature (TA, in °C) and power dissipation (PD, in watts) according to

the formula:

TJ = TA + (PD • θJA)

where

θJA (in °C/W) is the package thermal impedance.

Note 3: This parameter is tested in a feedback loop which servos VFB1 to

the midpoint for the error ampliﬁer (VITH1 = 0.75V).

Note 4: External compensation on ITH pin.

Note 5: Dynamic supply current is higher due to the internal gate charge

being delivered at the switching frequency.

Note 6: See description of the TRACK/SS pin in the Pin Functions section.

Note 7: When sourcing current, the average output current is deﬁned

as ﬂowing out of the SW pin. When sinking current, the average output

current is deﬁned as ﬂowing into the SW pin. Sinking mode requires the

use of forced continuous mode.

Note 8: See description of the MODE pin in the Pin Functions section.

Note 9: Guaranteed by design and correlation to wafer level measurements

for QFN packages.

Note 10: This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 125°C when overtemperature protection is active.

Continuous operation above the speciﬁed maximum operating junction

temperature may impair device reliability or permanently damage the

device.

The

l denotes the speciﬁcations which apply over the full operating

junction temperature range, otherwise speciﬁcations are at TA = 25°C (Note 2), SVIN = PVINx = 3.3V, RT = 178k, unless otherwise

speciﬁed.

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