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HD64F36024FX Datasheet(PDF) 91 Page - Renesas Technology Corp |
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HD64F36024FX Datasheet(HTML) 91 Page - Renesas Technology Corp |
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91 / 386 page ![]() Section 4 Address Break Rev. 4.00 Sep. 23, 2005 Page 63 of 354 REJ09B0025-0400 Figures 4.2 show the operation examples of the address break interrupt setting. NOP instruc- tion prefetch Register setting • ABRKCR = H'80 • BAR = H'025A Program 0258 025A 025C 0260 0262 : * NOP NOP MOV.W @H'025A,R0 NOP NOP : 0258 Address bus φ Interrupt request 025A 025C 025E SP-2 SP-4 NOP instruc- tion prefetch MOV instruc- tion 1 prefetch MOV instruc- tion 2 prefetch Internal processing Stack save Interrupt acceptance Underline indicates the address to be stacked. When the address break is specified in instruction execution cycle Figure 4.2 Address Break Interrupt Operation Example (1) MOV instruc- tion 1 prefetch Register setting • ABRKCR = H'A0 • BAR = H'025A Program 0258 025A 025C 0260 0262 : * NOP NOP MOV.W @H'025A,R0 NOP NOP : 025C Address bus φ Interrupt request 025E 0260 025A 0262 0264 SP-2 MOV instruc- tion 2 prefetch NOP instruc- tion prefetch MOV instruc- tion execution Next instru- ction prefetch Internal processing Stack save NOP instruc- tion prefetch Interrupt acceptance Underline indicates the address to be stacked. When the address break is specified in the data read cycle Figure 4.2 Address Break Interrupt Operation Example (2) |
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