ZADCS146/147

12-Bit, 200ksps, ADC Family

Data Sheet

October 12, 2011

© 2011 Zentrum Mikroelektronik Dresden AG — Rev. 2.0

All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without

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1.3.3. Specific Parameters of basic ZADCS147 versions

Parameter

Symbol Conditions

Min

Typ

Max

Unit

External Reference at VREF

VREF Input Voltage Range

1.0

VDD +

50mV

V

VREF Input Current

VREF = 2.5V

180

215

µA

VREF Input Resistance

11.5

14

k



Shutdown VREF Input Current

0.1

µA

Capacitive Bypass at VREF

4.7

µF

Power Requirements

Positive Supply Voltage

VDD

2.7

5.25

V

Operating Mode

0.85

1.0

Positive Supply Current

IDD

VDD = 3.6V

Full Power-Down

0.5

4.0

µA

Operating Mode

1.00

1.3

Positive Supply Current

IDD

VDD = 5.25V

Full Power-Down

0.5

4.0

µA

1.3.4. Digital Pin Parameters

Parameter

Symbol Conditions

Min

Typ

Max

Unit

Digital Inputs (DIN, SCLK, CS, nSHDN)

VDD = 2.7V

1.9

V

Logic High Level

VDD = 5.25V

3.3

V

VDD = 2.7V

0.7

V

Logic Low Level

VDD = 5.25V

1.4

V

Hysteresis

0.7

V

Input Leakage

VIN = 0V or VDD

± 0.1

± 1.0

µA

Input Capacitance

5

pF

Digital Outptus (DOUT, SSTRB)

VDD = 2.7V

3.5

8.5

mA

Output High Current

VDD = 5.25V

5.5

10.8

mA

VDD = 2.7V

4

11.5

mA

Output Low Voltage

VDD = 5.25V

6.4

15.3

mA

Three-State Leakage Current

nCS = VDD

± 0.1

± 1.0

µA

Three-State Output Capacitance

nCS = VDD

5

pF