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ZIOL2102 Datasheet(PDF) 81 Page - List of Unclassifed Manufacturers |
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ZIOL2102 Datasheet(HTML) 81 Page - List of Unclassifed Manufacturers |
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81 / 91 page  ZIOL2xxx – IC Family IO-Link compliant HV Line Driver IC Family Data Sheet January 31, 2012 © 2012 Zentrum Mikroelektronik Dresden AG — Rev. 2.2.1 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to changes without notice. 81 of 90 Where Tclk is the for the lock circuit configured counter clock (which is the same clock as used for the overload counter, refer to Figure 3.15, Figure 3.16, Figure 3.17) having a period of 200ns, 1ms, 8ms, or 16ms and where LockTimeVal is the in the related assert time register stored value. Figure 10.1 Peak Register Access Scenarios In contrast to Figure 10.1 in where the overload situation stops at the point in time in which the driver has been locked Figure 10.2 shows a situation in which the overload situation, especially an over-current situation is kept. This situation occurs for instance due to a low impedance load which is permanently interconnected to the driver output. In addition to that the lock reset is configured in that way that its period is significantly shorter compared with the assert time period. In this case the overload counter does not reach the zero value at the point in time the lock is reset. This in the following time the assert time is shortened and equals approximately the lock time that even passed by. |
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