PS10NG datasheet(3/9 Pages) SUTEX

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PS10

● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com

Functional Block Diagram

Electrical Characteristics (cont.) (-10V ≤ V

IN ≤ -90V, TA = 25°C unless otherwise speciﬁed)

Sym

Parameter

Min

Typ Max Units Conditions

Power Good Timing (Test Conditions: C

RAMP = 10nF, VUV = VEE + 1.9V, VOV = VEE + 0.5V)

RAMP

Ramp pin output current

µA

---

PWRGD-A

Time from UV high to PWRGD-A

8.8

EE = -48V,

RAMP = 10nF, see

typical application circuit

PWRGD-B

Maximum time from PWRGD-A to PWRGD-B

150 200* 250

RTB = 120kΩ

PWRGD-B

Minimum time from PWRGD-A to PWRGD-B

3.0

5.0*

8.0

RTD = 3.0kΩ

PWRGD-C

Maximum time from PWRGD-B to PWRGD-C

150 200* 250

RTB = 120kΩ

PWRGD-C

Minimum time from PWRGD-B to PWRGD-C

3.0

5.0*

8.0

RTD = 3.0kΩ

PWRGD-D

Maximum time from PWRGD-C to PWRGD-D

150 200* 250

RTB = 120kΩ

PWRGD-D

Minimum time from PWRGD-C to PWRGD-D

3.0

5.0*

8.0

RTD = 3.0kΩ

* Variations will track. For example if t

PWRGD-A is 250ms, then so will be tPWRGD-B/C/D. Contact factory for tighter tolerance version.

Power Good Outputs (Test Conditions: V

UV = VEE + 1.9V, VOV = VEE + 0.5V)

PWRGD-X(hi)

Power good pin breakdown voltage

PWRGD-X = HI Z

PWRGD-X(lo)

Power good pin output low voltage

0.4

0.5

PWRGD = 1.0mA,

PWRGD-X = LOW

PWRGD-X(lk)

Maximum leakage current

<1.0

µA

PWRGD = 90V,

PWRGD-X = HI Z

Regulator

& POR

UVLO

VBG

Band Gap

Reference

Programmable

Timer

PWR GD- B

PWR GD- A

PWR GD- C

PWR GD- D

10uA

VINT

RAMP

Vint - 1.2V

VINT

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