EL2140CS datasheet(6/12 Pages) ELANTEC

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EL2140C2141C

150 MHz Differential Twisted Pair Driver

Applications Information

EL2141C

2140-13

GAIN e

R1 a R2 a R3

EL2140C

2140-14

GAIN e 2

VOUT a VOUTB

VREF

(common mode)

Choice of feedback resistor

There is little to be gained from choosing resistor

R2 values below 400

X and in fact it would only

result in increased power dissipation and signal

distortion Above 400

X the bandwidth response

will develop some peaking (for a gain of two) but

substantially higher resistor R2 values may be

used for higher voltage gains such as up to 2 k

at a gain of eight before peaking will develop R1

and R3 are selected as needed to set the voltage

gain and while R1 e R3 is suggested the gain

equation above holds for any values (see distor-

tion for further suggestions)

Capacitance considerations

As with many high bandwidth amplifiers the

EL2140C2141C prefer not to drive highly capac-

itive loads It is best if the capacitance on VOUT

and VOUTB is kept below 10 pF if the user does

not want gain peaking to develop

In addition on the EL2141C the two feedback

nodes FBP and FBN should be laid out so as to

minimize stray capacitance else an additional

pole will potentially develop in the response with

possible gain peaking

The amount of capacitance tolerated on any of

these nodes in an actual application will also be

dependent on the gain setting and the resistor

values in the feedback network

Distortion considerations

The harmonics that these amplifiers will poten-

tially produce are the 2nd 3rd 5th and 6th

Their amplitude is application dependent

All

other harmonics should be negligible by compari-

son Each should be considered separately

H2 The second harmonic arises from the input

stage and the lower the applied differential sig-

nal amplitude the lower the magnitude of the

second harmonic For practical considerations of

required output signal and input noise levels the

user will end up choosing a circuit gain Refer-

ring to Figure 1 it is best if the voltage at the

negative feedback node tracks the VREF node

and the voltage at the positive feedback node

tracks the VIN node respectively This would the-

oretically require that R1 a R2 e R3 although

the lowest distortion is found at about R3 e R1

(07 R2) With this arrangement the second

harmonic should be suppressed well below the

value of the third harmonic

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