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EL4093CS Datasheet(PDF) 11 Page - Elantec Semiconductor |
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EL4093CS Datasheet(HTML) 11 Page - Elantec Semiconductor |
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11 / 16 page  EL4093C 300 MHz DC-Restored Video Amplifier Applications Information Contd Autozero Range The autozero range is defined as the difference between the input DC level and the reference voltage to restore to The size of this range is a function of the gain setting resistors used and the SH output current swing For a gain of a2 the optimum feedback resistor is 750 X and the avail- able SH output current is g55 mA minimum To determine the autozero range for this case we refer to Figure 3 below 4093 – 39 Figure 3 Suppose that the input DC level is aVDC and that the reference voltage is 0V We know that in feedback the following two conditions will exist on the CFA first its output will be equal to 0V (due to autozero) and second its VINb voltage is equal to the VINa voltage (ie VINbe a VDC) So we have a potential difference of a VDC across both RF and RG resulting in a cur- rent IRF e IRG e VDC 750X that must flow into each of them This current IAZ e (IRF a IRG) must come from the SH output Since the maximum that IAZ can be is 55 mA we can solve for VDC using the following IAZ e g55 mA e 2 VDC 750 X J and see that VDC e g2V This range can easily accommodate most video signals As another example consider the case where we are restoring to a reference voltage of a075V Using the same reasoning as above a current IRF e (VDC b 075V)RF must flow through RF and a current IRG e VDC RG must go into RG Again our boundary condition is that IRF a IRG s g 55 mA and we can solve for the allowable VDC values using the following g 55 mA e VDC b 075V 750 X a VDC 750 X Hence VDC must be between a24V to b17V This example illustrates that when the reference changes the autozero range also changes In gen- eral the user should determine the autozero range for hisher application and ensure that the input signal is within this range during the au- tozero period Autozero Loop Bandwidth The gain-bandwidth product (GBWP) of the au- tozero loop is determined by the size of the hold capacitor the value of RF and the transconduct- ances (gm’s) of the SH amplifier To begin the SH amplifier is modeled as in Figure 4 below First the input stage transconductance is repre- sented by gm1 with the compensation capacitor given by CHOLD This stage’s GBWP is thus gm1(2 q CHOLD) e 1(2q (350X)(22 nF)) e 207 kHz Next since the SH has a current output its output stage can be modeled as a transconductance gm2 in this case having a val- ue of 1(500 X) The current from gm2 then flows through the I to V converter made up of the CFA and RF to produce a voltage gain Thus the GBWP of the overall loop is given by GBWP e gm1 2 q CHOLD (gm2 RF) 11 |
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