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PI6C48543 Datasheet(PDF) 5 Page - Pericom Semiconductor Corporation

Part # PI6C48543
Description  3.3V Low Skew 1-to-4, 800MHz, Differential to LVDS Fanout Buffer
PDF  7 Pages
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Manufacturer  PERICOM [Pericom Semiconductor Corporation]
Direct Link  http://www.pericom.com
Logo PERICOM - Pericom Semiconductor Corporation

PI6C48543 Datasheet(HTML) 5 Page - Pericom Semiconductor Corporation

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PI6C48543
3.3V Low Skew 1-to-4, 800MHz,
Differential to LVDS Fanout Buffer
5
PS8771B
10/02/08
AC Characteristics (TA = -40oC to 85oC, VCC = 3.135V to 3.465V)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
fmax
Output Frequency
800
MHz
tPd
Propagation Delay(1)
f ≤ 800 MHz
1.0
2.2
ns
Tsk(o)
Output-to-output Skew(2)
40
ps
Tsk(pp)
Part-to-part Skew(3)
300
tr/tf
Output Rise/Fall time
20% - 80%
100
300
odc
Output duty cycle
48
52
%
Notes:
1.
Measured from the differenital input crossing point to the differential output crossing point
2
Skew between outputs with the same supply voltage and equal load conditions. Measured at the differential outputs crossing point.
3.
Skew between outputs on different parts operating with the same supply voltage and equal load conditions. Measured at the differential out-
puts crossing point.
4.
All parameters are measured at 500 MHz unless noted otherwise
LVDS DC Characteristics (TA = -40oC to 85oC, VCC = 3.135V to 3.465V unless otherwise stated below.)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
VOD
Differential Output Voltage
200
280
360
mV
∆VOD
VOD Magnitude Change
0
40
VOS
Offset Voltage
1.125
1.25
1.375
V
∆VOS
VOS Magnitude Change
5
25
mV
IOZ
High Impedance Leakage Current
-10
+10
μA
IOFF
Power OFF Leakage
-20
±1
+20
IOSD
Differential Output Short Circuit Current
-3.5
-5
mA
IOS
Output Short Circuit Current
-3.5
-5
VOH
Output Voltage High
1.34
1.6
V
VOL
Output Voltage Low
0.9
1.06
Applications Information
Wiring the differential input to accept single ended levels
Figure 1 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF = VDD/2 is
generated by the bias resistors R1, R2 and C1. This bias circuit should be located as close as possible to the input pin. The ratio of
R1 and R2 might need to be adjusted to postion the V_REF in the center of the input voltage swing. For example, if the input clock
swing is only 2.5V and VDD = 3.3V, V_REF should be 1.25V and R1/R2 = 0.609.
08-0247



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