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EM73P362CQ Datasheet(PDF) 14 Page - ELAN Microelectronics Corp |
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EM73P362CQ Datasheet(HTML) 14 Page - ELAN Microelectronics Corp |
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14 / 44 page ![]() 14 * This specification are subject to be changed without notice. 11.1.2001 EM73P362 EM73P362 EM73P362 EM73P362 EM73P362 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT 4-BIT MICRO-CONTROLLER FOR LCD PRODUCT ST ST ST ST STOP OPERA OP OPERA OP OPERA OP OPERA OP OPERATION MODE TION MODE TION MODE TION MODE TION MODE During STOP operation mode, CPU holds the system’s internal status with a low power consumption, for the STOP mode, the system clock will be stopped in the STOP condition and system need a warm up time for the stability of system clock running after wakeup. The STOP operation mode is controlled by Port 16 and released by P0(0..3)/WAKEUP 0 3 .. . P16 3 2 1 0 Initial value : 0000 SPME SWWT SPME Enable STOP mode SWWT Set wake-up warm-up time 0 1 Enable STOP mode 0 0 29 / XIN * * Reserved 0 1 214 / XIN 1 0 216 / XIN 1 1 Reserved STOP operation mode condition : 1. Osc stop and CPU internal status held. 2. Internal time base clear to "0". 3. CPU internal memory, flags, register, I/O held original states. 4. Program counter hold the executed address after STOP release. Release condition : 1. Release STOP operation mode by the falling edge of any one of P0(0..3)/WAKEUP 0 3 .. . 2. Osc start to oscillating. 3. Warm-up time passing. 4. According PC to execute the following program. Note : There are 4 independent mask options for wakeup function in EM73P362. So, the wakeup function of P0(0..3)/WAKEUP 0 3 .. are enabled or disabled independently. IDLE OPERA IDLE OPERA IDLE OPERA IDLE OPERA IDLE OPERATION MODE TION MODE TION MODE TION MODE TION MODE The IDLE operation mode retains the internal status with low power consumption without stopping the system clock function and LCD display. The IDLE operation mode is controlled by Port 19 and released by P0(0..3)/WAKEUP 0..3 or the internal timing generator. P19 3 2 1 0 Initial value : 0000 IDME SIDR IDME Enable IDLE mode SIDR Select IDLE releasing condition 0 1 Enable IDLE mode 0 0 P0(0..3) pin input * * Reserved 0 1 P0(0..3) pin input and 1 sec signal 1 0 P0(0..3) pin input and 0.5 sec signal 1 1 P0(0..3) pin input and 15.625m sec signal |
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