EM78P458AP datasheet(8/76 Pages) EMC

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EM78P458/459

OTP ROM

4. FUNCTION DESCRIPTION

DATA & CONTROL BUS

IOC5

Comparators

8 ADC

2 PWMs

IOC6

ACC

STACK 0

STACK 1

STACK 2

STACK 3

STACK 4

P C

ROM

Instruction

Decoder

ALU

Interrupt

Control

/INT

RAM

WDT Timer

Prescaler

Oscillator/

Timming

Control

WDT

Time-out

R1(TCC)

Sleep

Wake Up

Control

ENTCC

STACK 5

STACK 6

STACK 7

Fig. 2 The Functional Block Diagram of EM78P458/459

4.1 Operational Registers

1. R0 (Indirect Addressing Register)

R0 is not a physically implemented register. Its major function is to perform as an indirect addressing

pointer. Any instruction using R0 as a pointer, actually accesses data pointed by the RAM Select

2. R1 (Time Clock /Counter)

• Increased by an external signal edge through the TCC pin, or by the instruction cycle clock.

• The signals to increase the counter are decided by Bit 4 and Bit 5 of the CONT register.

• Writable and readable as any other registers.

3. R2 (Program Counter) & Stack

• R2 and hardware stacks are 12-bit wide. The structure is depicted in Fig. 4.

• Generates 4K

×13 bits on-chip ROM addresses to the relative programming instruction codes. One

program page is 1024 words long.

• The contents of R2 are set to all "0"s upon a RESET condition.

This specification is subject to change without prior notice.

06.25.2004 (V1.4)

EM78P458AP Datasheet(PDF) 8 Page - ELAN Microelectronics Corp

EM78P458AP Datasheet(HTML) 8 Page - ELAN Microelectronics Corp

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