EM78P458AP datasheet(14/76 Pages) EMC

14 / 76 page

EM78P458/459

OTP ROM

• Bit 5 (TS) TCC signal source

0: internal instruction cycle clock. If P54 is used as I/O pin, TS must be 0.

1: transition on the TCC pin

• Bit 4 (TE) TCC signal edge

0: increment if the transition from low to high takes place on the TCC pin;

1: increment if the transition from high to low takes place on the TCC pin.

• Bit 3 (PAB) Prescaler assignment bit.

0: TCC;

1: WDT.

• Bit 2 (PSR2) ~ Bit 0 (PSR0) TCC/WDT prescaler bits.

PSR2

PSR1

PSR0

TCC Rate

WDT Rate

1:2

1:1

1:4

1:2

1:8

1:4

1:16

1:8

1:32

1:16

1:64

1:32

1:128

1:64

1:256

1:128

• CONT register is both readable and writable.

3. IOC50 ~ IOC60 (I/O Port Control Register)

• "1" puts the relative I/O pin into high impedance, while "0" defines the relative I/O pin as output.

• IOC50 and IOC60 registers are both readable and writable.

4. IOC90 (GCON: I/O Configuration & Control of ADC )

OP2E

OP1E

G22

G21

G20

G12

G11

G10

• Bit 7 ( OP2E ) Enable the gain amplifier which input is connected to P64 and output is connected to

the 8-1 analog switch.

0 = OP2 is off ( default value ), and bypasses the input signal to the ADC;

1 = OP2 is on.

• Bit 6 ( OP1E ) Enable the gain amplifier whose input is connected to P60 and output is connected to

the 8-1 analog switch.

0 = OP1 is off (default value), and bypasses the input signal to the ADC;

1 = OP1 is on.

• Bit 5:Bit 3 (G22 and G20): Select the gain of OP2.

000 = IS x 1 (default value);

This specification is subject to change without prior notice.

06.25.2004 (V1.4)

EM78P458AP Datasheet(PDF) 14 Page - ELAN Microelectronics Corp

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