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AT25DF011 Datasheet(PDF) 31 Page - List of Unclassifed Manufacturers |
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AT25DF011 Datasheet(HTML) 31 Page - List of Unclassifed Manufacturers |
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31 / 39 page ![]() 31 AT25DF011 DS-25DF011–032A–4/2014 Notes: 1. Not 100% tested (value guaranteed by design and characterization). 2. Only applicable as a constraint for the Write Status Register command when BPL = 1. Note: 1. Maximum values indicate worst-case performance after 100,000 erase/program cycles. 2. Not 100% tested (value guaranteed by design and characterization). 3. Program and Erase operations characterized at -10°C to +85°C. Program and Erase operations at -40°C to -10°C require a minimum of 1.7V. t EUDPD. Chip Select High to Ultra Deep Power-Down 3 3 µs tSWRST Software Reset Time 60 60 µs t CSLU Minimum Chip Select Low to Exit Ultra Deep Power-Down 20 20 ns tXUDPD Exit Ultra Deep Power-Down Time 100 100 µs t RDPD (1) Chip Select High to Standby Mode 8 8 µs 13.6 Program and Erase Characteristics Symbol Parameter 1.65V-3.6V 2.3V-3.6V Min Typ Max Min Typ Max Units tPP (1) Page Program Time (256 Bytes) 1.5 5.0 1.5 5.0 ms t BP Byte Program Time 12 8 µs tPE Page Erase Time 6 25 6 25 ms tBLKE (1) Block Erase Time 4 Kbytes 50 150 50 120 ms 32 Kbytes 400 500 350 400 t CHPE (1)(2) Chip Erase Time 1600 2000 1400 1600 ms tOTPP (1) OTP Security Register Program Time 400 950 400 950 µs t WRSR (2) Write Status Register Time 20 40 20 40 ms 13.7 Power-up Conditions Symbol Parameter Min Max Units tVCSL Minimum VCC to Chip Select Low Time 70 µs t PUW Power-up Device Delay Before Program or Erase Allowed 5 ms V POR Power-on Reset Voltage 1.45 1.6 V Symbol Parameter 1.65V to 3.6V 2.3V to 3.6V Units Min Typ Max Min Typ Max |
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