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ACPL-P302 Datasheet(PDF) 12 Page - AVAGO TECHNOLOGIES LIMITED

Part # ACPL-P302
Description  0.4 Amp Output Current IGBT Gate Driver Optocouplers
PDF  14 Pages
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Manufacturer  AVAGO [AVAGO TECHNOLOGIES LIMITED]
Direct Link  http://www.avagotech.com
Logo AVAGO - AVAGO TECHNOLOGIES LIMITED

ACPL-P302 Datasheet(HTML) 12 Page - AVAGO TECHNOLOGIES LIMITED

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12
CMR with the LED On (CMRH)
A high CMR LED drive circuit must keep the LED on during
common mode transients. This is achieved by overdriv-
ing the LED current beyond the input threshold so that
it is not pulled below the threshold during a transient. A
minimum LED current of 7 mA provides adequate margin
over the maximum IFLH of 5 mA to achieve 10 kV/μs CMR.
LED Drive Circuit Considerations for Ultra High CMR Per-
formance
Without a detector shield, the dominant cause of opto-
coupler CMR failure is capacitive coupling from the input
side of the optocoupler, through the package, to the
detector IC as shown in Figure 19. The ACPL-P302/W302
improves CMR performance by using a detector IC with
an optically transparent Faraday shield, which diverts the
capacitively coupled current away from the sensitive IC
circuitry. However, this shield does not eliminate the ca-
pacitive coupling between the LED and optocoupler pins
5-8 as shown in Figure 20. This capacitive coupling causes
perturbations in the LED current during common mode
transients and becomes the major source of CMR failures
for a shielded optocoupler. The main design objective of
a high CMR LED drive circuit becomes keeping the LED in
the proper state (on or off ) during common mode tran-
sients. For example, the recommended application circuit
(Figure 17), can achieve 10 kV/μs CMR while minimizing
component complexity.
Techniques to keep the LED in the proper state are dis-
cussed in the next two sections.
Figure 21. Equivalent Circuit for Figure 15 During Common Mode Transient.
The open collector drive circuit, shown in Figure 22, can
not keep the LED off during a +dVCM/dt transient, since
all the current flowing through CLEDN must be supplied
by the LED, and it is not recommended for applications
requiring ultra high CMRL performance. The alternative
drive circuit which like the recommended application
circuit (Figure 17), does achieve ultra high CMR perfor-
mance by shunting the LED in the off state.
Figure 19. Optocoupler Input to Output Capacitance Model for Unshielded
Optocouplers.
Figure 20. Optocoupler Input to Output Capacitance Model for Shielded
Optocouplers.
Figure 22. Not Recommended Open Collector Drive Circuit.
CMR with the LED Off (CMRL)
A high CMR LED drive circuit must keep the LED off (VF
d VF(OFF)) during common mode transients. For example,
during a -dVCM/dt transient in Figure 21, the current
flowing through CLEDP also flows through the RSAT and
VSAT of the logic gate. As long as the low state voltage de-
veloped across the logic gate is less than VF(OFF) the LED
will remain off and no common mode failure will occur.
Figure 23. Recommended LED Drive Circuit for Ultra-High CMR Dead Time
and Propagation Delay Specifications.
C
LEDP
C
LEDN
6
1
5
2
4
3
C
LEDP
C
LEDN
6
1
5
2
4
3
C
LEDP
C
LEDN
6
1
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2
4
3
SHIELD
C
LED01
C
LED02
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C
LED02
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LEDP
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LEDN
6
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SHIELD
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LEDP
R
g
V
CC = 18V
+
-
0.1 mF
THEARROWS INDICATETHEDIRECTION
OF CURRENTFLOW DURING - dV
CM/ dt
+5 V
V
SAT
+
-
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CM
I
+
-
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SAT
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LEDP
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LEDN
6
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+5 V
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LEDP
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LEDN
6
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3
SHIELD
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LEDN
+5 V
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LEDN
6
1
5
2
4
3
SHIELD
+5 V
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LEDP
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LEDN
6
1
5
2
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3
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