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LM3495

www.ti.com

SNVS410E – FEBRUARY 2006 – REVISED NOVEMBER 2007

A good estimate for the maximum AC rms current is one-half of the maximum load current. For this example, the

rms input current can be estimated as 3.5A. Regardless of the type and number of capacitors used, every design

will benefit from the addition of a 0.1 µF to 1 µF ceramic capacitor placed as close as possible to the drain of the

high-side FET and the source of the low-side FET.

In most applications for POL power supplies, the input voltage is the output of another switching converter. This

output often has a lot of bulk capacitance. One 22 µF MLCC provides enough local smoothing and keeps the

input impedance high enough to prevent power supply interaction from the source. For switching power supplies,

the minimum quality dielectric that should be used is X5R. The preferred capacitor voltage rating for a 12V input

voltage is 25V, due to the drop-off in capacitance of MLCCs under a DC bias. Capacitors with a 16V rating can

still be used if size and cost are limiting factors. For this example the current rating of each of the capacitors

should be at least 3Arms. The ESR of large-value ceramic caps is usually below 10 m

Ω, which keeps the heating

to a minimum.

CURRENT LIMIT

For this design, the trip point for the current limit circuitry should be below the peak current rating of the output

low-side FET, and to prevent excessive heating of the inductor, a target of 15A has been chosen. A 3.8A margin

exists between the expected 11.2A peak current and the current limit threshold to allow for line and load

3.32 k

Ω 1%.

CONTROL LOOP COMPENSATION

The LM3495 uses emulated peak current-mode PWM control to correct changes in output voltage due to line and

load transients. This unique architecture combines the fast line transient response of peak current mode control

with the ability to regulate at very low duty cycles. As a further advantage, the small signal characteristics of

emulated peak current mode control are almost identical to those of traditional peak current mode control, and

hence compensation can be selected using nearly identical calculations.

The control loop is comprised of two parts. The first is the power stage, which consists of the duty cycle

amplifier with a typical transconductance of 750 µmho and a typical output impedance of 72 M

Ω. Figure 8 shows

the regulator and voltage control loop components.

Figure 8. Power Stage and Error Amp

One popular method for selecting the compensation components is to create Bode plots of gain and phase for

the power stage and error amplifier. Combined, they make the overall bandwidth and phase margin of the

regulator easy to determine. Software tools such as Excel, MathCAD, and Matlab are useful for observing how

changes in compensation or the power stage affect system gain and phase.

Copyright © 2006–2007, Texas Instruments Incorporated

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