LP3943 datasheet(13/21 Pages) TI1

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VDD

LED 15

LED 0

LP3943

LM2750-5.0

VIN

VOUT

CAP+

CAP-

CFLY

1 PF

2.2 PF

2.7V to 5.5V

2.2 PF

LP3943

www.ti.com

SNVS256A – MAY 2004 – REVISED MAY 2004

Step 4: Set PWM1 duty cycle to 50%

Step 5: Set LEDs 13, 14 and 15 off by loading the data into LS3 register

Step 6: Set LEDs 0 to 7 to point to DIM0

Step 7: Set LEDs 8 to 12 to point to DIM1

Step

Description

Set to (Hex)

Set DIM0 = 1s

PSC0

0x09F

1 = (PSC0 + 1)/160

PSC0 = 159

Set duty cycle to 25%

PWM0

0x40

Duty Cycle = PWM0/256

PWM0 = 64

Set DIM1 = 0.2s

PSC1

0x1F

0.2 = (PSC1 + 1)/160

PSC1 = 31

Set duty cycle to 50%

PWM1

0x80

Duty Cycle = PWM1/256

PWM1 = 128

LEDs 13, 14 and 15 off

LS3

0x03

Output = HIGH

LEDs 0 to 7

LS0, LS1

LS0 = 0xAA

Output = DIM0

LS1 = 0xAA

LEDs 8 to 12

LS2, LS3

LS2 = 0xFF

Output = DIM1

LS3 = 0x03

REDUCING IQ WHEN LEDS ARE OFF

In many applications, the LEDs and the LP3943 share the same VDD, as shown in Typical Application Circuit.

When the LEDs are off, the LED pins are at a lower potential than VDD, causing extra supply current (ΔIQ). To

minimize this current, consider keeping the LED pins at a voltage equal to or greater than VDD.

Figure 11. Methods to Reduce IQ When LEDs Are Off

Figure 12. LP3943 With 5V Booster

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