MB86342B datasheet(3/19 Pages) FUJITSU

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MB86342B

s PIN DESCRIPTION

Pin No.

Pin name

I/O

Function

MCLK1

Clock input

MCLK2

I/O

Clock input/output

XRST

Reset signal input

SCKO

System clock output

Master/Slave select input

L: Master (X’tal) H:Slave (external clock)

SYNC

Synchronous/Asynchronous select input

EXTIN

System clock input (384fs)

13, 14

FS1, FS2

Sampling frequency switching signal input

KFSIO

I/O

Audio input/output clock (384fs)

Test pin (usually clipped to GND)

PSTOP

PLL and crystal oscillator control signal

EXLOCK

Lock signal input of EXTIN

HCLK

Clock input for serial input-data of host interface

HDIN

Serial data input of host interface

HDOUT

Serial data output of host interface

HCS

Chip-select signal input of host interface

BST

Usually clipped to GND

30 to 32, 35 to 39

GP0 to GP7

I/O

Input/output of 8-bit general port data

LRCKI1

I/O

Sampling clock input/output for audio interface serial data

BCKI1

I/O

Bit clock input/output for audio interface serial data

LRCKI2

Sampling clock input for audio interface serial data

BCKI2

Bit clock input for audio interface serial data

19, 22

SD1, SD2

Serial data input of audio interface

LRCKO

Sampling clock output for audio interface serial data

BCKO

Bit clock output for audio interface serial data

25 to 27

SDO1 to SDO3

Serial data output of audio interface

MOD

Bus-mode control signal input

Chip-select signal output for external SRAM interface

Write enable signal output for external SRAM interface

49 to 52, 55 to 64, 66, 67 A00 to A15

Address data output of external SRAM interface

68 to 77,80 to 82

85 to 89, 91, 92

D00 to D19

I/O

Data input/output of external SRAM interface

ICCLK

Clock output for emulator

ICBRK

External break control signal input for emulator

95, 96

ICD0, ICD1

I/O

Input/output signal for data/address of emulator

97 to 99

ICS0 to ICS2

Status signal output for emulator

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