LT3755 datasheet(22/26 Pages) LINER

22 / 26 page

LT3791-1

37911fa

For more information www.linear.com/LT3791-1

applicaTions inForMaTion

The path formed by switch M1, switch M2, D1 and the

CIN capacitor should have short leads and PC trace

lengths. The path formed by switch M3, switch M4, D2

and the COUT capacitor also should have short leads

and PC trace lengths.

The output capacitor (–) terminals should be connected

as close as possible to the (–) terminals of the input

capacitor.

Connect the top driver bootstrap capacitor, C1, closely

to the BST1 and SW1 pins. Connect the top driver

bootstrap capacitor, C2, closely to the BST2 and SW2

pins.

Connecttheinputcapacitors,CIN,andoutputcapacitors,

COUT, closely to the power MOSFETs. These capaci-

tors carry the MOSFET AC current in boost and buck

operation.

Route SNSN and SNSP leads together with minimum

PC trace spacing. Avoid sense lines pass through noisy

areas, such as switch nodes. Ensure accurate current

sensing with Kelvin connections at the SENSE resistor.

Connect the VC pin compensation network close to the

IC, between VC and the signal ground pins. The capaci-

tor helps to filter the effects of PCB noise and output

voltage ripple voltage from the compensation loop.

ConnecttheINTVCCbypasscapacitor,CVCC,closetothe

IC,betweentheINTVCCandthepowergroundpins.This

capacitorcarriestheMOSFETdrivers’currentpeaks.An

additional 0.1µF ceramic capacitor placed immediately

next to the INTVCC and PGND pins can help improve

noise performance substantially.

LT3755 Datasheet(PDF) 22 Page - Linear Technology