MB89628R datasheet(3/44 Pages) FUJITSU

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MB89628R/629R/P629

s PRODUCT LINEUP

*1: The piggyback/evaluation product is applicable to the MB89620 series.

*2: Varies with conditions such as the operating frequency. (See section “s Electrical Characteristics.”) In the case

of the MB89PV620, the voltage varies with the restrictions of the EPROM for use.

MB89629R

MB89P629

MB89PV620*1

Classification

Mass production products

(mask ROM products)

One-time PROM

product for evaluation and

development

Piggyback/evaluation

product for evaluation and

development

ROM size

24 K

× 8 bits

(internal mask ROM)

32 K

× 8 bits

(internal mask ROM)

32 K

× 8 bits

(internal PROM, programming

with general-purpose EPROM

programmer)

32 K

× 8 bits

(external ROM)

RAM size

3072

× 8 bits

4096

× 8 bits

1 K

× 8 bits

CPU functions

Number of instructions:

136

Instruction bit length:

8 bits

Instruction length:

1 to 3 bytes

Data bit length:

1, 8, 16 bits

Minimum execution time:

0.4

µs/10 MHz

Interrupt processing time:

3.6

µs/10 MHz

Ports

Input ports:

5 (4 ports also serve as peripherals.)

Output ports (N-ch open-drain):

8 (All also serve as peripherals.)

I/O ports (N-ch open-drain):

8 (4 ports also serve as peripherals.)

Output ports (CMOS):

I/O ports (CMOS):

Total:

8-bit PWM timer

8-bit reload timer operation (toggled output capable, operating clock cycle: 0.4

µs to 3.3 ms)

8-bit resolution PWM operation (conversion cycle: 102

µs to 839 ms)

8-bit pulse width count

timer

8-bit timer operation (overflow output capable, operating clock cycle: 0.4 to 12.8

µs)

8-bit reload timer operation (toggled output capable, operating clock cycle: 0.4 to 12.8

µs)

8-bit pulse width measurement operation (Continuous measurement “H” pulse width/“L”

pulse width/from

↑ to ↑/from ↓ to ↓ capable)

16-bit timer/counter

16-bit timer operation (operating clock cycle: 0.4

µs)

16-bit event counter operation (Rising/falling/both edges selectability)

8-bit serial I/O 1,

8-bit serial I/O 2

8-bits

LSB first/MSB first transfer selectability

One clock selectable from four transfer clocks

(one external shift clock, three internal shift clocks: 0.8

µs, 3.2 µs, 12.8 µs)

8-bit A/D converter

8-bit resolution

× 8 channels

A/D conversion mode (conversion time: 18

µs)

Sense mode (conversion time: 5

µs)

Continuous activation by an external activation or an internal timer capable

Reference voltage input

External interrupt

4 independent channels (edge selection, interrupt vector, source flag)

Rising edge/falling edge selectability

Used also for wake-up from stop/sleep mode. (Edge detection is also permitted in stop mode.)

Standby modes

Sleep mode, stop mode

Process

CMOS

Operating voltage*2

2.2 V to 6.0 V

2.7 V to 6.0 V

EPROM for use

MB89628R

MBM27C256A-20

Part number

Parameter

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