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LMP92018 Datasheet(PDF) 13 Page - Texas Instruments

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Part # LMP92018
Description  LMP92018 Analog System Monitor and Controller
PDF  34 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LMP92018 Datasheet(HTML) 13 Page - Texas Instruments

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LMP92018
www.ti.com
SNAS514B – NOVEMBER 2011 – REVISED MAY 2013
INSTRUCTION SET
The following is a complete listing of the instruction set supported by the LMP92018. Where applicable the
default state or register content is indicated in bold type.
The digital interface (SPI) protocol is described in SERIAL INTERFACE. The interface timing diagram is in SPI
Interface Timing Diagram
NOTE: the tables in following sections detail the data transfers of 2 subsequent SPI frames . The FRAME
1 column shows the user input into pin DIN of the device. The FRAME 2 column in the device output at
DOUT.
TEMPERATURE SENSOR CONFIGURE
A single bit, TSS, controls the mode of operation of the internal temperature sensor. The bit can be set and
tested via the SPI transactions shown in the following table. The internal temperature sensor is described in
DIGITAL TEMPERATURE SENSOR.
FRAME 1: DIN
FRAME 2: DOUT
Command
Payload
Command
Payload
Bit
→
23
22:16
15:1
0
23
22:16
15:1
0
READ
1
0010000
x
x
1
0010000
000000000000000
TSS
WRITE
0
0010000
000000000000000
TSS
0
0010000
000000000000000
0
x
Don't Care
1: Temperature Sensor in Continuous Conversion Mode
TSS
0: Temperature Sensor In One Shot Mode
REFERENCE CONFIGURE
The internal reference mode of operation is controlled by a 3 bit sequence, CREF. The sequence can be set and
tested via the SPI transactions shown in the following table. The reference block is described in INTERNAL
VOLTAGE REFERENCE SOURCE.
FRAME 1: DIN
FRAME 2: DOUT
Command
Payload
Command
Payload
Bit
→
23
22:16
15:3
2:0
23
22:16
15:3
2:0
READ
1
0010001
x
x
1
0010001
0000000000000
CREF
WRITE
0
0010001
0000000000000
CREF
0
0010001
0000000000000
000
x
Don't care
Reference Mode Selector
000: AREF external, DREF internal
001: AREF and DREF internal; REF pin is internally disconnected
010: AREF and DREF external
CREF
011: AREF internal, DREF external
100: Deep Sleep
101: AREF and DREF internal; REF driven by internal reference
110: Deep Sleep
111: Deep Sleep
Copyright © 2011–2013, Texas Instruments Incorporated
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