PS20060

Data Sheet

Details of the programming registers are shown in the following sections. Default values on power up are also

shown.

Table 3 - Control Registers

MSB

LSB

ACK

7

654

32

10

Address

1

1

0

0

0MA1

MA00

A

Byte 1

Programmable

divider

0

D14

D13

D12

D11

D10

D9

D8

A

Byte 2W

Programmable

divider

D7

D6

D5

D4

D3

D2

D1

D0

A

Byte 3W

Control data

1

C1C0R4

R3R2

R1R0

A

Byte 4W

Control data

BS1

BS0

SL1

SL0

P3

P2

P1

P0

A

Byte 5W

Control Data

LO1

LO0

ATC

IFE

X

AT2

AT1

AT0

A

Byte 6W

Control Data

SAS

X

AGD

ADS

T3

T2

T1

T0

A

Byte 7W

A

Acknowledge bit

MA1, MA0

Address bits

D14-D0

Programmable division ratio control bits

R4-R0

Reference division ratio select

C1, C0

Charge pump current select

BS1-BS0

Band select bits

SL1-SL0

Power down modes

SAS

SAWF drive output select

P3-P0

P3-P0 port output states

ADS

ADC input select

ATC

AGC Decay Current

AGD

AGC Disable

AT2:AT0

AGC Onset threshold Control

LO1:LO0

LO trim control bits

T3-T0

Test mode control bits

IFE

IF AGC amplifier enable

X

Don’t Care

Data Sheet 291359 issue 1

Plessey Semiconductors Ltd.

Design & Technology Centre, Delta 500, Delta Business Park, Great Western Way, Swindon, UK SN5 7XE

Tel: +44 1793 518000

Fax: +44 1793 518030

Web: www.plesseysemi.com

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