HD74AC182/HD74ACT182

3

Logic Diagram

GP

Please note that this diagram is provided only for the understanding of logic operations and should not be

used to estimate propagation delays.

Functional Description

The HD74AC182/HD74ACT182 carry lookahead generator accepts up to four pairs of Active Low Carry

Propagate (

P

provides anticipated Active High carries (C

The

HD74AC182/HD74ACT182 also has Active Low Carry Propagate (

P) and Carry Generate (G) outputs

which may be used for further level of lookahead. The logic equations provided at the outputs are:

C

C

C

G= G

P= P

Also, the HD74AC182/HD74ACT182 can be used with binary ALUs in an active Low or active High input

operand mode. The connections (Figure a) to and from the ALU to the carry lookahead generator are

identical in both cases. Carries are rippled between lookahead blocks. The critical speed path follows the

circled numbers. There are several possible arrangements for the carry interconnects, but all achieve about

the same speed. A 28-bit ALU is formed by dropping the last HD74AC182/HD74ACT182.