Supertex inc.

Supertex inc.

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888

www.supertex.com

VP2106

P-Channel Enhancement-Mode

Vertical DMOS FET

Absolute Maximum Ratings

Parameter

Value

Drain-to-source voltage

BV

DSS

Drain-to-gate voltage

BV

DGS

Gate-to-source voltage

±20V

Operating and storage temperature

Absolute Maximum Ratings are those values beyond which damage to the device

may occur. Functional operation under these conditions is not implied. Continuous

operation of the device at the absolute rating level may affect device reliability. All

voltages are referenced to device ground.

Ordering Information

Device

Package

BV

(V)

R

DS(ON)

(max)

(Ω)

I

D(ON)

(min)

(mA)

TO-92

VP2106

VP2106N3-G

-60

12

-500

-G indicates package is RoHS compliant (‘Green’)

TO-92 (N3)

Product Marking

TO-92 (N3)

YY = Year Sealed

WW = Week Sealed

= “Green” Packaging

SiVP

2106

YYWW

Features

Applications

memories, displays, bipolar transistors, etc.)

General Description

The Supertex VP2106 is an enhancement-mode (normally-

off) transistor that utilizes a vertical DMOS structure

and Supertex’s well-proven silicon-gate manufacturing

process. This combination produces a device with the

power handling capabilities of bipolar transistors, and the

high input impedance and positive temperature coefficient

inherent in MOS devices. Characteristic of all MOS

structures, this device is free from thermal runaway and

thermally-induced secondary breakdown.

Supertex’s vertical DMOS FETs are ideally suited to a

wide range of switching and amplifying applications where

very low threshold voltage, high breakdown voltage, high

input impedance, low input capacitance, and fast switching

speeds are desired.

GATE

SOURCE

DRAIN

Pin Configuration

Package may or may not include the following marks: Si or