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AT90PWM2 Datasheet(PDF) 86 Page - ATMEL Corporation |
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AT90PWM2 Datasheet(HTML) 86 Page - ATMEL Corporation |
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86 / 365 page ![]() 86 4317K–AVR–03/2013 AT90PWM2/3/2B/3B • Bit 0 – PSRSYNC: Prescaler Reset When this bit is one, Timer/Counter1 and Timer/Counter0 prescaler will be Reset. This bit is nor- mally cleared immediately by hardware, except if the TSM bit is set. Note that Timer/Counter1 and Timer/Counter0 share the same prescaler and a reset of this prescaler will affect both timers. Table 13-1. ICPSEL1 ICPSEL1 Description 0 Select ICP1A as trigger for timer 1 input capture 1 Select ICP1B as trigger for timer 1 input capture |
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