AT90PWM2 datasheet(114/365 Pages) ATMEL

114 / 365 page

114

4317K–AVR–03/2013

AT90PWM2/3/2B/3B

updated by the value written. Then when the low byte (OCRnxL) is written to the lower eight bits,

the high byte will be copied into the upper 8-bits of either the OCRnx buffer or OCRnx Compare

For more information of how to access the 16-bit registers refer to “Accessing 16-bit Registers”

on page 106.

15.6.1

Force Output Compare

In non-PWM Waveform Generation modes, the match output of the comparator can be forced by

writing a one to the Force Output Compare (FOCnx) bit. Forcing compare match will not set the

OCFnx Flag or reload/clear the timer, but the OCnx pin will be updated as if a real compare

match had occurred (the COMn1:0 bits settings define whether the OCnx pin is set, cleared or

toggled).

15.6.2

Compare Match Blocking by TCNTn Write

All CPU writes to the TCNTn Register will block any compare match that occurs in the next timer

clock cycle, even when the timer is stopped. This feature allows OCRnx to be initialized to the

same value as TCNTn without triggering an interrupt when the Timer/Counter clock is enabled.

15.6.3

Using the Output Compare Unit

Since writing TCNTn in any mode of operation will block all compare matches for one timer clock

cycle, there are risks involved when changing TCNTn when using any of the Output Compare

channels, independent of whether the Timer/Counter is running or not. If the value written to

TCNTn equals the OCRnx value, the compare match will be missed, resulting in incorrect wave-

form generation. Do not write the TCNTn equal to TOP in PWM modes with variable TOP

values. The compare match for the TOP will be ignored and the counter will continue to 0xFFFF.

Similarly, do not write the TCNTn value equal to BOTTOM when the counter is downcounting.

The setup of the OCnx should be performed before setting the Data Direction Register for the

port pin to output. The easiest way of setting the OCnx value is to use the Force Output Com-

pare (FOCnx) strobe bits in Normal mode. The OCnx Register keeps its value even when

changing between Waveform Generation modes.

Be aware that the COMnx1:0 bits are not double buffered together with the compare value.

Changing the COMnx1:0 bits will take effect immediately.

15.7

Compare Match Output Unit

The Compare Output mode (COMnx1:0) bits have two functions. The Waveform Generator uses

the COMnx1:0 bits for defining the Output Compare (OCnx) state at the next compare match.

Secondly the COMnx1:0 bits control the OCnx pin output source. Figure 15-5 shows a simplified

schematic of the logic affected by the COMnx1:0 bit setting. The I/O Registers, I/O bits, and I/O

pins in the figure are shown in bold. Only the parts of the general I/O Port Control Registers

(DDR and PORT) that are affected by the COMnx1:0 bits are shown. When referring to the

OCnx state, the reference is for the internal OCnx Register, not the OCnx pin. If a system reset

occur, the OCnx Register is reset to “0”.

AT90PWM2 Datasheet(PDF) 114 Page - ATMEL Corporation

AT90PWM2 Datasheet(HTML) 114 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL