| Electronic Components Datasheet Search |
|
AT90PWM2 Datasheet(PDF) 146 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
AT90PWM2 Datasheet(HTML) 146 Page - ATMEL Corporation |
|
146 / 365 page ![]() 146 4317K–AVR–03/2013 AT90PWM2/3/2B/3B Figure 16-15. PSCOUTn0 retriggered by PSCn Input A (Edge Retriggering) Note: This exemple is given in “Input Mode 8” in “2 or 4 ramp mode” See Figure 16-31. for details. Figure 16-16. PSCOUTn0 retriggered by PSCn Input A (Level Acting) Note: This exemple is given in “Input Mode 1” in “2 or 4 ramp mode” See Figure 16-20. for details. 16.8.3 Retrigger PSCOUTn1 On External Event PSCOUTn1 ouput can be resetted before end of On-Time 1 on the change on PSCn Input B. The polarity of PSCn Input B is configurable thanks to a sense control block. PSCn Input B can be configured to do not act or to act on level or edge modes. PSCn Input B can be the Output of the analog comparator or the PSCINn input. As the period of the cycle decreases, the instantaneous frequency of the two outputs increases. On-Time 0 On-Time 1 PSCOUTn0 PSCOUTn1 Dead-Time 1 Dead-Time 0 PSCn Input A (falling edge) PSCn Input A (rising edge) On-Time 0 On-Time 1 PSCOUTn0 PSCOUTn1 Dead-Time 1 Dead-Time 0 PSCn Input A (high level) PSCn Input A (low level) |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |