AT90PWM2 datasheet(262/365 Pages) ATMEL

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4317K–AVR–03/2013

AT90PWM2/3/2B/3B

• Bit 2 – DALA: Digital to Analog Left Adjust

Set this bit to left adjust the DAC input data.

Clear it to right adjust the DAC input data.

The DALA bit affects the configuration of the DAC data registers. Changing this bit affects the

DAC output on the next DACH writing.

• Bit 1 – DAOE: Digital to Analog Output Enable bit

Set this bit to output the conversion result on D2A,

Clear it to use the DAC internally.

• Bit 0 – DAEN: Digital to Analog Enable bit

Set this bit to enable the DAC,

Clear it to disable the DAC.

22.4.2

Digital to Analog Converter input Register – DACH and DACL

DACH and DACL registers contain the value to be converted into analog voltage.

Writing the DACL register forbid the update of the input value until DACH has not been written

too. So the normal way to write a 10-bit value in the DAC register is firstly to write DACL the

DACH.

In order to work easily with only 8 bits, there is the possibility to left adjust the input value. Like

this it is sufficient to write DACH to update the DAC value.

22.4.2.1

DALA = 0

22.4.2.2

DALA = 1

Timer/Counter0 Overflow

Timer/Counter1 Compare Match B

Timer/Counter1 Overflow

Timer/Counter1 Capture Event

Table 22-1.

DAC Auto Trigger source selection (Continued)

DATS2

DATS1

DATS0

Description

Bit

654

DAC9

DAC8

DACH

DAC7

DAC6

DAC5

DAC4

DAC3

DAC2

DAC1

DAC0

DACL

Read/Write

R/W

Initial Value

000

Bit

654