HCPL3150 datasheet(14/15 Pages) HP

14 / 15 page

1-210

turn off of LED1) so that under

worst-case conditions, transistor

Q1 has just turned off when

transistor Q2 turns on, as shown

in Figure 34. The amount of delay

necessary to achieve this condi-

tions is equal to the maximum

value of the propagation delay

difference specification, PDDMAX,

which is specified to be 350 ns

over the operating temperature

range of -40

°C to 100°C.

Delaying the LED signal by the

maximum propagation delay

difference ensures that the

minimum dead time is zero, but it

does not tell a designer what the

maximum dead time will be. The

maximum dead time is equivalent

to the difference between the

maximum and minimum propaga-

tion delay difference specifica-

tions as shown in Figure 35. The

maximum dead time for the

HCPL-3150 is 700 ns (= 350 ns -

(-350 ns)) over an operating

temperature range of -40

°C to

100

°C.

Note that the propagation delays

used to calculate PDD and dead

time are taken at equal tempera-

tures and test conditions since

the optocouplers under consider-

ation are typically mounted in

close proximity to each other and

are switching identical IGBTs.

CLEDP

CLEDN

CLEDP

CLEDN

SHIELD

CLEDO1

CLEDO2

Figure 29. Optocoupler Input to Output

Capacitance Model for Unshielded Optocouplers.

Figure 30. Optocoupler Input to Output

Capacitance Model for Shielded Optocouplers.

Figure 31. Equivalent Circuit for Figure 25 During

Common Mode Transient.

Figure 33. Recommended LED Drive

Circuit for Ultra-High CMR.

CLEDP

CLEDN

SHIELD

+5 V

CLEDP

CLEDN

SHIELD

+5 V

ILEDN

Figure 32. Not Recommended Open

Collector Drive Circuit.

VSAT

VCM

ILEDP

CLEDP

CLEDN

SHIELD

* THE ARROWS INDICATE THE DIRECTION

OF CURRENT FLOW DURING –dVCM/dt.

+5 V

–

VCC = 18 V

• • •

0.1

µF

–

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