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ICS83052I Datasheet(PDF) 11 Page - Integrated Device Technology |
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ICS83052I Datasheet(HTML) 11 Page - Integrated Device Technology |
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11 / 17 page ![]() ICS83052I REVISION B DECEMBER 8, 2011 11 ©2011 Integrated Device Technology, Inc. ICS83052I Data Sheet 2:1, SINGLE ENDED MULTIPLEXER POWER CONSIDERATIONS This section provides information on power dissipation and junction temperature for the ICS830521I. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS830521I is the sum of the core power plus the analog power plus the power dissipated in the load(s). The following is the power dissipation for V DD = 3.3V + 5% = 3.465V, which gives worst case results. Core and LVDS Output Power Dissipation • Power (core) MAX = V DD_MAX * (I DD + I DDo ) = 3.4565V * (40mA + 5mA) = 155.93mW • Output Impedance R OUT Power Dissipation due to Loading 50 Ω to V DD /2 Output Current I OUT = VDDO_MAX / [2 * (50Ω + ROUT)] = 3.465 / [2 * (50Ω + 15Ω)] = 26.7mA • Power Dissipation on the R OUT per LVCMOS output Power (R OUT) = ROUT * (IOUT) 2 = 15 Ω * (26.7mA)2 = 10.7mW Dynamic Power Dissipation at 250MHz • Power (250MHz) = C PD * frequency * (VDD) 2 = 18pF * 250MHz * (3.465V)2 = 54.0mW Total Power Dissipation • Total Power = Power (core) MAX + Power (R OUT) Total Power + Power (250MHz) = 155.93mW + 10.7mW + 54.0mW =220.6mW |
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