W232 datasheet(1/6 Pages) CYPRESS

Part #	W232

Description	Ten Output Zero Delay Buffer

PDF	6 Pages

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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W232

Ten Output Zero Delay Buffer

Cypress Semiconductor Corporation

•

198 Champion Court

•

San Jose

, CA 95134-1709

•

408-943-2600

Document #: 38-07167 Rev. *E

Revised April 27, 2009

Features

■ Well-Suited to both 100 and 133 MHz Designs

■ 10 or 11 LVCMOS/LVTTL Outputs

■ 3.3V Power Supply

■ Available in 24-Pin TSSOP Package

Key Specifications

■ Operating Voltage: 3.3V ± 10%

■ Operating Range: 25 MHz < fOUT < 140 MHz

■ Cycle-to-Cycle Jitter less than 150 ps

■ Output to Output Skew less than100 ps

■ Phase Error Jitter less than 125 ps

■ Static Phase Error: less than 150 ps

Pinouts

Figure 1. 24-Pin TSSOP - W232-09

Figure 2. 24-Pin TSSOP - W232-10

Q0

PLL

Q1

Q2

Q3

Q5

Q6

OE0:4

Q7

Q8

FBOUT

Q4

Q9

OE

OE5:8

Configuration of these blocks dependent upon specific option being used.

FBIN

CLK

Logic Block Diagram

CLK

AVDD

VDD

Q8

Q7

GND

Q6

Q5

VDD

OE5:8

FBIN

24

23

22

21

20

19

18

17

16

15

14

13

AGND

VDD

Q0

Q1

Q2

GND

Q3

Q4

VDD

OE0:4

FBOUT

1

2

3

4

5

6

7

8

9

10

11

12

CLK

AVDD

VDD

Q9

Q8

GND

Q7

Q6

Q5

VDD

FBIN

24

23

22

21

20

19

18

17

16

15

14

13

AGND

VDD

Q0

Q1

Q2

GND

Q3

Q4

VDD

OE

FBOUT

1

2

3

4

5

6

7

8

9

10

11

12

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