GMS81608K datasheet(22/79 Pages) HYNIX

22 / 79 page

MEMORY ORGANIZATION

The GMS81604 has separate address spaces for Pro-

gram and Data Memory. Program memory can only be

read, not written to. It can be up to 4K (8K for

GMS81608) bytes of Program Memory. Data mem-

ory can be read and written to up to 256 bytes including

the stack area.

Registers

This device has six registers that are the Program

Counter (PC), a Accumulator (A), two Index registers

(X,Y), the Stack Pointer (SP) and the Program Status

Word (PSW). The Program Counter consists of 16-bit

Accumulator: The accumulator is the 8-bit general

purpose register, used for data operation such as trans-

fer, temporary saving and conditional judgment, etc.

The accumulator can be used as a 16-bit register with

Y register as shown below.

X register, Y register: In the addressing modes which

use these index registers, the register contents are

added to the specified address and this becomes the

actual address. These modes are extremely effective

for referencing subroutine tables and memory tables.

The index registers also have increment, decrement,

compare and data transfer functions and they can be

used as simple accumulators.

Stack Pointer: The stack pointer is an 8-bit register

used for occurrence interrupts and calling out subrou-

tines. The stack can be located at any position within

100H to 13FH of the internal data memory. Data store

and restore sequence to(from) stack area is shown in

Figure 0.

Caution:

The stack pointer must be initialized by software

because its value is undefined after reset.

Ex)

LDX

#03FH

TXSP

; SP

← 3FH

Program Counter: The program counter is a 16-bit

wide which consists of two 8-bit registers, PCH, PCL.

This counter indicates the address of the next instruc-

tion to be executed. In reset state, the program counter

has reset routine address (PCH: FFH, PCL: FEH). .

Program Status Word : The Program Status Word

(PSW) contains several status bits that reflect the cur-

rent state of the CPU. The PSW shown in Figure 6. It

contains the Negative flag, the Overflow flag, the

Direct page flag, the Break flag, the Half Carry (for

BCD operations), the Interrupt enable flag, the Zero

flag and the Carry bit.

[Carry flag C]

This flag stores any carry or borrow from the ALU of

CPU after an arithmetic operation and is also changed

by the Shift instruction or rotate instruction.

[Zero flag Z]

This flag is set when the result of an arithmetic opera-

tion or data transfer is "0" and is cleared by any other

result.

[Interrupt disable flag I] This flag enables/disables all

interrupts except interrupt caused by Reset or software

PCH

PCL

PSW

ACCUMULATOR

PROGRAM COUNTER

X REGISTER

Y REGISTER

STACK POINTER

PROGRAM STATUS

WORD

Figure 3. Configuration of Registers

TWO 8-BIT REGISTERS

ONE "YA" 16-BIT REGISTER

Figure 4. Configuration of YA 16-bit register

Hardware fixed.

Stack Address (100H~13FH)

Figure 5. Stack Pointer

GMS81604/08

LG Semicon

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