HC2509C

March 1999

3

Table 1. Pin Description

Pin

Name

Pin No.

Type

Functional Description

CLK

24

I

Clock Input. CLK provides the reference signal to the internal PLL.

FBIN

13

I

Feedback Input. FBIN provides the feedback signal to the internal PLL.

IG

11

I

Output Bank Enable. When 1G is high, all outputs 1Y(0:4) are enabled.

When 1G is low, Outputs 1Y(0:4) are disabled to a logic-low state.

2G

14

I

Output Bank Enable. When 2G is high, all outputs 2Y(0:3) are enabled.

When 2G is low, Outputs 2Y(0:3) are disabled to a logic-low state.

FBOUT

12

O

Feedback Output. FBOUT completes the feedback loop of the PLL by being

wired to FBIN.

1Y(0:4)

3,4,5,8,9

O

Clock Outputs. These outputs provide low-skew copies of CLKIN. Each output

has an embedded series-damping resistor.

2Y(0:3)

16,17,

20,21

O

Clock Outputs. These outputs provide low-skew copies of CLKIN. Each output

has an embedded series-damping resistor.

23

Power

to the device outputs.

AGND

1

Ground

Analog Ground. AGND provides the ground reference for the analog circuitry.

2,10,15,22

Power

Power Supply

GND

6,7,18,19

Ground

Ground

Table 2. Absolute Maximum Ratings Over Operating Free-air Temperature

Range

Symbols

Parameter

Value

Unit

Conditions

Supply Voltage Range

-0.5 to 4.6

V

Input Voltage Range

-0.5 to 6.5

V

Voltage Range applied to any input in the high or

low state

-0.5 to

Vcc+0.5

V

Input Clamp Current

±50

mA

Output Clamp Current

±50

mA

Continuous Output Current

±50

mA

Maximum Power Dissipaiton

0.7

W

Storage Temperature Range

-65 to 150

°C